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Difference between revisions of "intel/microarchitectures/tiger lake"
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{{intel title|Tigerlake|arch}}
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{{intel title|Tiger Lake|arch}}
 
{{microarchitecture
 
{{microarchitecture
| atype           = CPU
+
|atype=CPU
| name             = Tigerlake
+
|name=Tiger Lake
| designer         = Intel
+
|designer=Intel
| manufacturer     = Intel
+
|manufacturer=Intel
| introduction     = 2019
+
|introduction=2020
| phase-out        =  
+
|process=10 nm
| process         = 10 nm
+
|isa=x86-64
 
+
|predecessor=Ice Lake (client)
| succession      = Yes
+
|predecessor link=intel/microarchitectures/ice lake (client)
| predecessor     = Icelake
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|successor=Alder Lake
| predecessor link = intel/microarchitectures/icelake
+
|successor link=intel/microarchitectures/alder lake
| successor       =  
+
|contemporary=Sapphire Rapids
| successor link   =  
+
|contemporary link=intel/microarchitectures/sapphire rapids
 +
|succession=Yes
 
}}
 
}}
'''Tigerlake''' ('''TGL''') is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Icelake}}. Tigerlake is expected to be fabricated using a [[10 nm process]]. Tigerlake is the "Optimization" microarchitecture as part of Intel's {{intel|PAO}} model.
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'''Tiger Lake''' ('''TGL''') is [[Intel]]'s successor to {{\\|Ice Lake (client)|Ice Lake}}, a [[10 nm process|10nm]] [[microarchitecture]] for mainstream workstations, desktops, and mobile devices.
  
 
== Process Technology==
 
== Process Technology==
{{main|intel/microarchitectures/cannonlake#Process_Technology|l1=Cannonlake § Process Technology}}
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{{main|intel/microarchitectures/cannon lake#Process_Technology|l1=Cannon Lake § Process Technology}}
Tigerlake is set to use the same [[10 nm process]] that was designed for Cannonlake.
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Tiger Lake will be manufactured on Intel's third generation enhanced [[10 nm process|10nm++ process]].
 +
 
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== History ==
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[[File:intel 2019 investor meeting tiger lake roadmap.png|right|thumb|Intel 2019 and 2020 Roadmap]]
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Tiger Lake was first announced at Intel's 2019 Investor Meeting in May. Tiger Lake was said to succeed Ice Lake in 2020.
 +
 
 +
== Architecture ==
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Not much is known about Tiger Lake's architecture.
  
== See also ==
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=== Key changes from {{\\|Ice Lake}}===
* AMD {{amd|Zen 2|l=arch}}
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* Core
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** {{\\|Sunny Cove}} '''➡''' {{\\|Willow Cove}}
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** Up to 50% larger Level 3 cache - 3MB per core from 2MB per core
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* GPU
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** {{intel|Gen11|l=arch}} '''➡''' {{intel|Gen12|l=arch}} (Xe)
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** 1.5x more EUs (96, up from 64)
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* Display
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** [[HDMI]] 2.1 (from HDMI 2.0b)
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* I/O
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** PCIe 4.0 (from 3.0)

Revision as of 12:11, 17 December 2019

Edit Values
Tiger Lake µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2020
Process10 nm
Instructions
ISAx86-64
Succession
Contemporary
Sapphire Rapids

Tiger Lake (TGL) is Intel's successor to Ice Lake, a 10nm microarchitecture for mainstream workstations, desktops, and mobile devices.

Process Technology

Main article: Cannon Lake § Process Technology

Tiger Lake will be manufactured on Intel's third generation enhanced 10nm++ process.

History

Intel 2019 and 2020 Roadmap

Tiger Lake was first announced at Intel's 2019 Investor Meeting in May. Tiger Lake was said to succeed Ice Lake in 2020.

Architecture

Not much is known about Tiger Lake's architecture.

Key changes from Ice Lake

  • Core
  • GPU
    • Gen11 Gen12 (Xe)
    • 1.5x more EUs (96, up from 64)
  • Display
    • HDMI 2.1 (from HDMI 2.0b)
  • I/O
    • PCIe 4.0 (from 3.0)
codenameTiger Lake +
designerIntel +
first launched2020 +
full page nameintel/microarchitectures/tiger lake +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameTiger Lake +
process10 nm (0.01 μm, 1.0e-5 mm) +