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Latest revision | Your text | ||
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|stages max=19 | |stages max=19 | ||
|isa=x86-64 | |isa=x86-64 | ||
+ | |extension=MOVBE | ||
|extension 2=MMX | |extension 2=MMX | ||
|extension 3=SSE | |extension 3=SSE | ||
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|extension 22=TXT | |extension 22=TXT | ||
|extension 23=TSX | |extension 23=TSX | ||
+ | |extension 24=RDSEED | ||
|extension 25=ADCX | |extension 25=ADCX | ||
+ | |extension 26=PREFETCHW | ||
|extension 27=CLFLUSHOPT | |extension 27=CLFLUSHOPT | ||
|extension 28=XSAVE | |extension 28=XSAVE | ||
+ | |extension 29=SGX | ||
+ | |extension 30=MPX | ||
|l1i=32 KiB | |l1i=32 KiB | ||
|l1i per=core | |l1i per=core |
Facts about "Skylake (client) - Microarchitectures - Intel"
codename | Skylake (client) + |
core count | 2 + and 4 + |
designer | Intel + |
first launched | August 5, 2015 + |
full page name | intel/microarchitectures/skylake (client) + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Skylake (client) + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |