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=== Idle power optimization === | === Idle power optimization === | ||
For mobility-specific power improvements, Intel improved battery life with Sandy Bridge as well as the overall power efficiency and reduced [[form factor]]. Key mobile features such as video playback have been substantially improved. The core, graphics, and package [[C-States]] have been enhanced to enable low-power idle and average power usage. Many new algorithms have been implemented which can take platform preferences from BIOS as well. This enables OEM to more finely tune the performance characteristics of the processor by indicating what kind of device this is and how power consumption and saving should be handled. | For mobility-specific power improvements, Intel improved battery life with Sandy Bridge as well as the overall power efficiency and reduced [[form factor]]. Key mobile features such as video playback have been substantially improved. The core, graphics, and package [[C-States]] have been enhanced to enable low-power idle and average power usage. Many new algorithms have been implemented which can take platform preferences from BIOS as well. This enables OEM to more finely tune the performance characteristics of the processor by indicating what kind of device this is and how power consumption and saving should be handled. | ||
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== Sockets/Platform == | == Sockets/Platform == |
Facts about "Sandy Bridge (client) - Microarchitectures - Intel"
codename | Sandy Bridge (client) + |
core count | 2 + and 4 + |
designer | Intel + |
first launched | September 13, 2010 + |
full page name | intel/microarchitectures/sandy bridge (client) + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Sandy Bridge (client) + |
phase-out | November 2012 + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |