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Latest revision | Your text | ||
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*** 1,536 µOPs, 8-way set associative | *** 1,536 µOPs, 8-way set associative | ||
**** 32 sets, 6-µOP line size | **** 32 sets, 6-µOP line size | ||
− | **** statically divided between threads, per core, inclusive with L1I | + | **** statically divided between threads, per core, inclusive with L1I |
** L1I Cache: | ** L1I Cache: | ||
*** 32 [[KiB]], 8-way set associative | *** 32 [[KiB]], 8-way set associative |
Facts about "Sandy Bridge (client) - Microarchitectures - Intel"
codename | Sandy Bridge (client) + |
core count | 2 + and 4 + |
designer | Intel + |
first launched | September 13, 2010 + |
full page name | intel/microarchitectures/sandy bridge (client) + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Sandy Bridge (client) + |
phase-out | November 2012 + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |