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|codename||Rocket Lake +|
|core count||4 +, 6 + and 8 +|
|full page name||intel/microarchitectures/rocket lake +|
|instance of||microarchitecture +|
|instruction set architecture||x86-64 +|
|name||Rocket Lake +|
|pipeline stages (max)||19 +|
|pipeline stages (min)||14 +|
|process||14 nm (0.014 μm, 1.4e-5 mm) +|