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Difference between revisions of "intel/microarchitectures/lakefield"
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'''Lakefield''' ('''LKF''') is a high-performance low-power [[3d integrated circuit|3D]] microarchitecture designed by Intel and introduced in [[2019]].
 
'''Lakefield''' ('''LKF''') is a high-performance low-power [[3d integrated circuit|3D]] microarchitecture designed by Intel and introduced in [[2019]].
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== Architecture ==
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* [[3d integrated circuit]]
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** {{intel|Foveros}} packaging
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** [[22 nm]] base field
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** [[10 nm]] compute field
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*** 1x {{\\|Sunny Cove}} [[big core]]
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*** 4x {{\\|Tremont}} [[small cores]]
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* GPU
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** {{\\|Gen11}} graphics
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* Memory
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** LPDDR4X up to 4266 MT/s
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** POP DRAM
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== Overview ==
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{{empty section}}

Revision as of 10:50, 10 May 2019

Edit Values
Lakefield µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2019
Process22 nm, 10 nm
Core Configs5
Pipeline
TypeSuperscalar, Superpipeline
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAx86-64
Cache
L2 Cache512 KiB + 1.5 MiB
L3 Cache4 MiB/chip

Lakefield (LKF) is a high-performance low-power 3D microarchitecture designed by Intel and introduced in 2019.

Architecture

Overview

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Facts about "Lakefield - Microarchitectures - Intel"
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codenameLakefield +
core count5 +
designerIntel +
first launched2019 +
full page nameintel/microarchitectures/lakefield +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameLakefield +
process22 nm (0.022 μm, 2.2e-5 mm) + and 10 nm (0.01 μm, 1.0e-5 mm) +