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Difference between revisions of "intel/microarchitectures/ice lake (client)"
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{{intel title|Ice Lake|arch}}
 
{{intel title|Ice Lake|arch}}
 
{{microarchitecture
 
{{microarchitecture
| atype           = CPU
+
|atype=CPU
| name             = Ice Lake
+
|name=Ice Lake
| designer         = Intel
+
|designer=Intel
| manufacturer     = Intel
+
|manufacturer=Intel
| introduction     = 2018
+
|introduction=2018
| phase-out        =
+
|process=10 nm
| process         = 10 nm
+
|core name=Ice Lake S
 
+
|predecessor=Cannonlake
| succession      = Yes
+
|predecessor link=intel/microarchitectures/cannonlake
| predecessor     = Cannonlake
+
|successor=Tigerlake
| predecessor link = intel/microarchitectures/cannonlake
+
|successor link=intel/microarchitectures/tigerlake
| successor       = Tigerlake
+
|succession=Yes
| successor link   = intel/microarchitectures/tigerlake
 
 
}}
 
}}
 
'''Ice Lake''' ('''ICL''') is a [[microarchitecture]] designed by [[Intel]] as a successor to {{\\|Coffee Lake}}. Fabricated on a [[10 nm process]], Ice Lake is the "Architecture" microarchitecture as part of Intel's {{intel|PAO}} model.
 
'''Ice Lake''' ('''ICL''') is a [[microarchitecture]] designed by [[Intel]] as a successor to {{\\|Coffee Lake}}. Fabricated on a [[10 nm process]], Ice Lake is the "Architecture" microarchitecture as part of Intel's {{intel|PAO}} model.

Revision as of 16:36, 24 November 2017

Edit Values
Ice Lake µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2018
Process10 nm
Cores
Core NamesIce Lake S
Succession

Ice Lake (ICL) is a microarchitecture designed by Intel as a successor to Coffee Lake. Fabricated on a 10 nm process, Ice Lake is the "Architecture" microarchitecture as part of Intel's PAO model.

Process Technology

See also: Cannonlake § Process Technology

Ice Lake will use a second-generation enhanced 10 nm process called "10 nm+". Versus the first generation 10nm which was used for Cannonlake, 10nm+ will feature higher performance through higher drive current for the same power envelope.

intels 10+ and 10++.png

Architecture

Not much is known about Ice Lake's architecture.

Key changes from Cannonlake

Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.
codenameIce Lake +
designerIntel +
first launched2018 +
full page nameintel/microarchitectures/ice lake (client) +
instance ofmicroarchitecture +
manufacturerIntel +
microarchitecture typeCPU +
nameIce Lake +
process10 nm (0.01 μm, 1.0e-5 mm) +