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== References ==
 
== References ==
 
* Hammarlund, Per, et al. "Haswell: The fourth-generation intel core processor." IEEE Micro 34.2 (2014): 6-20.
 
* Hammarlund, Per, et al. "Haswell: The fourth-generation intel core processor." IEEE Micro 34.2 (2014): 6-20.
* Dan Ragland, Overclocking System Architect, 2015 IDF, in San Francisco, Session RPCS001 ("Overclocking 6th Generation Intel® Core™ Processors!"), August 18, 2015
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* * Dan Ragland, Overclocking System Architect, 2015 IDF, in San Francisco, Session RPCS001 ("Overclocking 6th Generation Intel® Core™ Processors!"), August 18, 2015
  
 
== Documents ==
 
== Documents ==
 
* [[:File:haswell isa extension.pdf|Haswell new ISA extensions]]
 
* [[:File:haswell isa extension.pdf|Haswell new ISA extensions]]

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codenameHaswell +
core count2 +, 4 +, 6 +, 8 +, 16 +, 10 +, 12 +, 14 + and 18 +
designerIntel +
first launchedJune 4, 2013 +
full page nameintel/microarchitectures/haswell (client) +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameHaswell +
phase-out2015 +
pipeline stages (max)19 +
pipeline stages (min)14 +
process22 nm (0.022 μm, 2.2e-5 mm) +