Revision history of "intel/microarchitectures/goldmont"

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(cur | prev) 23:05, 23 March 2020‎ David (talk | contribs)‎ m . . (6,958 bytes) (+6,958)‎ . . (Reverted edits by 188.165.24.181 (talk) to last revision by 204.246.162.41) (undo)
(cur | prev) 18:46, 23 March 2020‎ 188.165.24.181 (talk)‎ . . (empty) (-6,958)‎ . . (Blanked the page) (undo)
(cur | prev) 18:59, 15 July 2019‎ 204.246.162.41 (talk)‎ . . (6,958 bytes) (+66)‎ . . (added XSAVE, XSAVEOPT and FSGSBASE) (undo)
(cur | prev) 08:43, 15 May 2019‎ 213.175.37.10 (talk)‎ . . (6,892 bytes) (+32)‎ . . (L2 T/L) (undo)
(cur | prev) 17:44, 1 August 2018‎ 192.55.54.41 (talk)‎ . . (6,860 bytes) (-72)‎ . . (→‎New instructions) (undo)
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(cur | prev) 17:07, 9 March 2018‎ At32Hz (talk | contribs)‎ . . (6,186 bytes) (+117)‎ . . (→‎Key changes from {{intel|Airmont}}) (undo)
(cur | prev) 19:40, 30 November 2017‎ Mys 721tx (talk | contribs)‎ . . (6,069 bytes) (-13)‎ . . (undo)
(cur | prev) 09:10, 16 August 2017‎ ChipIt (talk | contribs)‎ . . (6,082 bytes) (+46)‎ . . (→‎Architecture) (undo)
(cur | prev) 18:29, 15 August 2017‎ Inject (talk | contribs)‎ m . . (6,036 bytes) (+19)‎ . . (→‎Codenames) (undo)
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(cur | prev) 17:46, 15 August 2017‎ Inject (talk | contribs)‎ . . (6,017 bytes) (+11)‎ . . (→‎Codenames) (undo)
(cur | prev) 17:21, 15 August 2017‎ Inject (talk | contribs)‎ . . (6,006 bytes) (+114)‎ . . (→‎Codenames: +Denverton) (undo)
(cur | prev) 17:16, 15 August 2017‎ Inject (talk | contribs)‎ . . (5,892 bytes) (+49)‎ . . (+Denverton) (undo)
(cur | prev) 07:02, 14 August 2017‎ Inject (talk | contribs)‎ m . . (5,843 bytes) (+12)‎ . . (undo)
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(cur | prev) 17:49, 18 June 2017‎ 193.165.236.28 (talk)‎ . . (6,353 bytes) (+22)‎ . . (undo)
(cur | prev) 19:19, 21 January 2017‎ David (talk | contribs)‎ . . (6,331 bytes) (+25)‎ . . (undo)
(cur | prev) 22:02, 11 November 2016‎ 193.165.237.87 (talk)‎ . . (6,306 bytes) (-30)‎ . . (→‎Key changes from {{intel|Airmont}}) (undo)
(cur | prev) 13:50, 6 November 2016‎ At32Hz (talk | contribs)‎ . . (6,336 bytes) (+3)‎ . . (undo)
(cur | prev) 13:50, 6 November 2016‎ At32Hz (talk | contribs)‎ . . (6,333 bytes) (+16)‎ . . (→‎Memory Hierarchy) (undo)
(cur | prev) 09:51, 27 October 2016‎ At32Hz (talk | contribs)‎ . . (6,317 bytes) (+3)‎ . . (→‎Key changes from {{intel|Airmont}}) (undo)
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(cur | prev) 08:32, 16 September 2016‎ David (talk | contribs)‎ . . (4,514 bytes) (+24)‎ . . (→‎Technology) (undo)
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(cur | prev) 23:50, 5 September 2016‎ David (talk | contribs)‎ . . (3,120 bytes) (+73)‎ . . (added cache info directly from datasheet) (undo)
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codename	Goldmont +
core count	2 +, 4 +, 8 +, 12 + and 16 +
designer	Intel +
first launched	August 30, 2016 +
full page name	intel/microarchitectures/goldmont +
instance of	microarchitecture +
instruction set architecture	x86-64 +
manufacturer	Intel +
microarchitecture type	CPU +
name	Goldmont +
pipeline stages (max)	14 +
pipeline stages (min)	12 +
process	14 nm (0.014 μm, 1.4e-5 mm) +

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