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Difference between revisions of "intel/microarchitectures/cannon lake"
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| designer = Intel | | designer = Intel | ||
| manufacturer = Intel | | manufacturer = Intel | ||
| − | | introduction = | + | | introduction = 2017 |
| phase-out = | | phase-out = | ||
| process = 10 nm | | process = 10 nm | ||
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| successor link = intel/microarchitectures/icelake | | successor link = intel/microarchitectures/icelake | ||
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| − | '''Cannonlake''' ('''CNL''') is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Kaby Lake}}. Cannonlake is expected to be fabricated using a [[10 nm process]]. | + | '''Cannonlake''' ('''CNL''') is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Kaby Lake}}. Cannonlake is expected to be fabricated using a [[10 nm process]]. Cannonlake is set to be introduced in the fourth quarter of [[2017]]. |
| + | |||
| + | == Process Technology == | ||
| + | Cannonlake is set to utilize Intel's [[10 nm process]] (P1274). | ||
| + | {{expand section}} | ||
| + | |||
| + | == Codenames == | ||
| + | {| class="wikitable" | ||
| + | |- | ||
| + | ! Core !! Abbrev !! Description !! Graphics !! Target | ||
| + | |- | ||
| + | | Cannonlake Y || CNL-Y || Extremely low power || GT2 || 2-in-1s detachable, tablets, and computer sticks | ||
| + | |- | ||
| + | | Cannonlake U || CNL-U || Ultra-low Power || GT2 || Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room | ||
| + | |} | ||
| + | |||
| + | == Architecture == | ||
| + | {{empty section}} | ||
| + | |||
| + | == All Cannonlake Chips == | ||
| + | <!-- NOTE: | ||
| + | This table is generated automatically from the data in the actual articles. | ||
| + | If a microprocessor is missing from the list, an appropriate article for it needs to be | ||
| + | created and tagged accordingly. | ||
| + | |||
| + | Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips | ||
| + | --> | ||
| + | <table class="wikitable sortable"> | ||
| + | <tr><th colspan="12" style="background:#D6D6FF;">Cannonlake Chips</th></tr> | ||
| + | <tr><th colspan="9">Main processor</th><th colspan="3">IGP</th></tr> | ||
| + | <tr><th>Model</th><th>µarch</th><th>Platform</th><th>Core</th><th>Launched</th><th>SDP</th><th>TDP</th><th>Freq</th><th>Max Mem</th><th>Name</th><th>Freq</th><th>Max Freq</th></tr> | ||
| + | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Cannonlake]] | ||
| + | |?full page name | ||
| + | |?model number | ||
| + | |?microarchitecture | ||
| + | |?platform | ||
| + | |?core name | ||
| + | |?first launched | ||
| + | |?sdp | ||
| + | |?tdp | ||
| + | |?base frequency#GHz | ||
| + | |?max memory#GB | ||
| + | |?integrated gpu | ||
| + | |?integrated gpu base frequency | ||
| + | |?integrated gpu max frequency | ||
| + | |format=template | ||
| + | |template=proc table 2 | ||
| + | |searchlabel= | ||
| + | |userparam=13 | ||
| + | |mainlabel=- | ||
| + | }} | ||
| + | {{table count|col=12|ask=[[Category:microprocessor models by intel]][[instance of::microprocessor]][[microarchitecture::Cannonlake]]}} | ||
| + | </table> | ||
Revision as of 07:55, 16 September 2016
| Edit Values | |
| Cannonlake µarch | |
| General Info |
Cannonlake (CNL) is a planned microarchitecture by Intel as a successor to Kaby Lake. Cannonlake is expected to be fabricated using a 10 nm process. Cannonlake is set to be introduced in the fourth quarter of 2017.
Process Technology
Cannonlake is set to utilize Intel's 10 nm process (P1274).
 |
This section requires expansion; you can help adding the missing info. |
Codenames
| Core | Abbrev | Description | Graphics | Target |
|---|---|---|---|---|
| Cannonlake Y | CNL-Y | Extremely low power | GT2 | 2-in-1s detachable, tablets, and computer sticks |
| Cannonlake U | CNL-U | Ultra-low Power | GT2 | Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room |
Architecture
| |
This section is empty; you can help add the missing info by editing this page. |
All Cannonlake Chips
| Cannonlake Chips | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| Main processor | IGP | ||||||||||
| Model | µarch | Platform | Core | Launched | SDP | TDP | Freq | Max Mem | Name | Freq | Max Freq |
| Count: 0 | |||||||||||
