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* '''{{intel|Silverthorne|l=core}}''' was the codename for a series of Mobile Internet Devices (MIDs) introduced in 2008. These processors had 1 core and 2 threads with a FSB operating at 400 MHz-533 MHz. Those models were branded as {{intel|Atom}} MIDs and went along with the {{intel|poulsbo|l=chipset}} chipset. | * '''{{intel|Silverthorne|l=core}}''' was the codename for a series of Mobile Internet Devices (MIDs) introduced in 2008. These processors had 1 core and 2 threads with a FSB operating at 400 MHz-533 MHz. Those models were branded as {{intel|Atom}} MIDs and went along with the {{intel|poulsbo|l=chipset}} chipset. | ||
− | * '''{{intel|Diamondville|l=core}}''' was the codename for the series of ultra cheap notebooks and desktops introduced in 2008. Diamondville is very much a soldered-on-motherboard derivative of {{intel|Silverthorne|l=core}} with faster FSB (operating at 533 MHz - 667 MHz). The dual-core version is | + | * '''{{intel|Diamondville|l=core}}''' was the codename for the series of ultra cheap notebooks and desktops introduced in 2008. Diamondville is very much a soldered-on-motherboard derivative of {{intel|Silverthorne|l=core}} with faster FSB (operating at 533 MHz - 667 MHz). The dual-core version is an [[Multi Chip Module]] (MCM) Silverthorne variant operating on the same [[FSB]]. |
=== Second Generation === | === Second Generation === |
Facts about "Bonnell - Microarchitectures - Intel"
codename | Bonnell + |
core count | 1 + and 2 + |
designer | Intel + |
first launched | March 2, 2008 + |
full page name | intel/microarchitectures/bonnell + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Bonnell + |
phase-out | 2011 + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 16 + |
process | 45 nm (0.045 μm, 4.5e-5 mm) + |