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Difference between revisions of "intel/microarchitectures/alder lake"
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(https://www.intel.com/content/www/us/en/search.html?ws=text#q=%22Raptor%20Lake%22&t=All "Provides customers an overview of high-level compatibility guidance between Alder Lake S and Raptor Lake S")
(ALderlake can support any memory config)
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** 10 nm enhanced Super-Fin node
 
** 10 nm enhanced Super-Fin node
 
* Memory
 
* Memory
** Support for DDR5
+
** Support for DDR5, LP5, DD4
 
** Speeds of at least 4800MHz, up to 5600MHz
 
** Speeds of at least 4800MHz, up to 5600MHz
 
* Improved power delivery system
 
* Improved power delivery system

Revision as of 15:03, 26 March 2021

Edit Values
Alder Lake µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2021
Process10 nm
Core Configs
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8+8,
"+8" can not be assigned to a declared number type with value 6.
6+8,
"+0" can not be assigned to a declared number type with value 6.
6+0
Instructions
ISAx86-64
Cores
Core NamesGolden Cove,
Gracemont
Succession

Alder Lake (ADL) is Intel's successor to Tiger Lake, a 10 nm microarchitecture for mainstream workstations, desktops, and mobile devices.


Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

Process Technology

Intel is planning Alder Lake to be built on an improved 10 nm Superfin node, or 10 nm++. This will be the case for both the powerful Golden Cove cores, and Gracemont cores.

History

Alder Lake was leaked already in 2019. In 2020 Alder Lake was seen for the first time in benchmarks. In January 2021 Intel teased Alder Lake in their CES 2021 speech. In February 2021, Alder Lake-P was spotted in Geekbench.

Architecture

Key changes from Tiger Lake

  • Core
    • Hybrid Golden Cove(big core) & Gracemont(small core) microarchitecture
    • At least 20% IPC improvements
    • 10 nm enhanced Super-Fin node
  • Memory
    • Support for DDR5, LP5, DD4
    • Speeds of at least 4800MHz, up to 5600MHz
  • Improved power delivery system
codenameAlder Lake +
designerIntel +
first launched2021 +
full page nameintel/microarchitectures/alder lake +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameAlder Lake +
process10 nm (0.01 μm, 1.0e-5 mm) +