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Difference between revisions of "intel/microarchitectures/alder lake"
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|introduction=2021
 
|introduction=2021
 
|process=10 nm
 
|process=10 nm
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|cores=8+8
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|cores 2=6+8
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|cores 3=6+0
 
|isa=x86-64
 
|isa=x86-64
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|core name=Golden Cove
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|core name 2=Gracemont
 
|predecessor=Tiger Lake
 
|predecessor=Tiger Lake
 
|predecessor link=intel/microarchitectures/tiger lake
 
|predecessor link=intel/microarchitectures/tiger lake

Revision as of 07:43, 3 February 2021

Edit Values
Alder Lake µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2021
Process10 nm
Core Configs
"+8" can not be assigned to a declared number type with value 8.
8+8,
"+8" can not be assigned to a declared number type with value 6.
6+8,
"+0" can not be assigned to a declared number type with value 6.
6+0
Instructions
ISAx86-64
Cores
Core NamesGolden Cove,
Gracemont
Succession

Alder Lake (ADL) is Intel's successor to Tiger Lake, a 10 nm microarchitecture for mainstream workstations, desktops, and mobile devices.


Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

Process Technology

Intel is planning Alder Lake to be built on an improved 10 nm Superfin node, or 10 nm++. This will be the case for both the powerful Golden Cove cores, and Gracemont cores.

History

Architecture

Key changes from Tiger Lake

  • Core
    • Hybrid Golden Cove(big core) & Gracemont(small core) microarchitecture
    • Up to 20% IPC improvements
    • Improved 10 nm node
codenameAlder Lake +
designerIntel +
first launched2021 +
full page nameintel/microarchitectures/alder lake +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameAlder Lake +
process10 nm (0.01 μm, 1.0e-5 mm) +