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(Overview)
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* {{x86|AVX512_VNNI|AVX-512 Vector Neural Network Instructions}} (AVX512_VNNI) - an instruction set extension that introduces reduced-precision (8-bit and 16-bit) multiply-accumulate for the acceleration of inference. VNNI was first introduced with {{intel|Cascade Lake|l=arch}} (server) and {{intel|Ice Lake (Client)|Ice Lake|l=arch}} (Client)
 
* {{x86|AVX512_VNNI|AVX-512 Vector Neural Network Instructions}} (AVX512_VNNI) - an instruction set extension that introduces reduced-precision (8-bit and 16-bit) multiply-accumulate for the acceleration of inference. VNNI was first introduced with {{intel|Cascade Lake|l=arch}} (server) and {{intel|Ice Lake (Client)|Ice Lake|l=arch}} (Client)
 
* {{x86|AVX512_BF16|AVX-512 BFloat16 Instructions}} (AVX512_BF16) - an instruction set extension for converting to [[bfloat16]] and then performing multiply-accumulate on such values for the acceleration of both inference and training. BG16 was first introduced with {{intel|Cooper Lake|l=arch}}.
 
* {{x86|AVX512_BF16|AVX-512 BFloat16 Instructions}} (AVX512_BF16) - an instruction set extension for converting to [[bfloat16]] and then performing multiply-accumulate on such values for the acceleration of both inference and training. BG16 was first introduced with {{intel|Cooper Lake|l=arch}}.
* {{x86|AMX|Advanced Matrix Extension}} (AMX) -  
+
* {{x86|AMX|Advanced Matrix Extension}} (AMX) - an extension that introduces a matrix register file and matrix operations
  
 
== Implementations ==
 
== Implementations ==

Revision as of 21:38, 30 June 2020

DL Boost Technology (deep learning boost) is an umbrella marketing term used by Intel for a collection of technologies designed for the acceleration of AI workloads, including both inference and training.

Overview

DL Boost is a term used by Intel to describe a set of features on their microprocessors designed to accelerate AI workloads. The term was first introduced with Cascade Lake but has since been extended further with more capabilities in newer microarchitectures.

DL Boost includes the following features:

Implementations

Microarchitecture AVX512_VNNI AVX512_BF16 AMX
Client
Ice Lake (Client)
Server
Cascade Lake
Cooper Lake
Ice Lake (Server)
Sapphire Rapids
Granite Rapids TBD TBD TBD
Diamond Rapids TBD TBD TBD

See also