From WikiChip
Difference between revisions of "intel/cpuid"
< intel

(→‎CPUIDs)
(→‎CPUIDs)
Line 57: Line 57:
 
|-
 
|-
 
| {{intel|Penryn (Client)|l=arch}} || {{intel|Penryn|l=core}}, {{intel|Wolfdale|l=core}}, {{intel|Yorkfield|l=core}} || 0 || 0x6 || 0x1 || 0x7 || [[Family 6 Model 23]]
 
| {{intel|Penryn (Client)|l=arch}} || {{intel|Penryn|l=core}}, {{intel|Wolfdale|l=core}}, {{intel|Yorkfield|l=core}} || 0 || 0x6 || 0x1 || 0x7 || [[Family 6 Model 23]]
 +
|-
 +
| rowspan=2" | {{intel|Core (client)|l=arch}} || {{intel|Merom L|l=core}} || 0 || 0x6 || 0x1 ||  0x6 || [[Family 6 Model 22]]
 +
|-
 +
| {{intel|Merom|l=core}} || 0 || 0x6 || 0x0 || 0xF || [[Family 6 Model 15]]
 +
|-
 +
| {{intel|Modified Pentium M|l=arch}} || {{intel|Yonah|l=core}} || 0 || 0x6 || 0x0 || 0xE || [[Family 6 Model 14]]
 
|-
 
|-
 
| colspan="7" style="text-align: center;" | <small>[[Big Cores]] (Server)</small>
 
| colspan="7" style="text-align: center;" | <small>[[Big Cores]] (Server)</small>
Line 90: Line 96:
 
| {{intel|Bloomfield|l=core}}, {{intel|Nehalem EP|EP|l=core}}, {{intel|Nehalem WS|WS|l=core}} || 0 || 0x6 || 0x1 || 0xA || [[Family 6 Model 26]]
 
| {{intel|Bloomfield|l=core}}, {{intel|Nehalem EP|EP|l=core}}, {{intel|Nehalem WS|WS|l=core}} || 0 || 0x6 || 0x1 || 0xA || [[Family 6 Model 26]]
 
|-
 
|-
−
| {{intel|Penryn (Server)|l=arch}} || {{intel|Harpertown|l=core}}, {{intel|Penryn QC|QC|l=core}}, {{intel|Wolfdale|l=core}}, {{intel|Yorkfield|l=core}} || 0 || 0x6 || 0x1 || 0x7 || [[Family 6 Model 23]]
+
| rowspan=2" | {{intel|Penryn (Server)|l=arch}} || {{intel|Dunnington|l=core}} || 0 || 0x6 || 0x1 || 0xD || [[Family 6 Model 29]]
 +
|-
 +
| {{intel|Harpertown|l=core}}, {{intel|Penryn QC|QC|l=core}}, {{intel|Wolfdale|l=core}}, {{intel|Yorkfield|l=core}} || 0 || 0x6 || 0x1 || 0x7 || [[Family 6 Model 23]]
 
|-
 
|-
 
| colspan="7" style="text-align: center;" | <small>[[Little Cores]]</small>
 
| colspan="7" style="text-align: center;" | <small>[[Little Cores]]</small>

Revision as of 01:06, 5 April 2018

Below is a list of Intel's CPUID broken down by their respective core names and microarchitecture:

CPUIDs

Under construction icon-blue.svg This article is a work in progress!
Microarchitecture Core Extended Family Family Extended Model Model
Big Cores (Client)
Meteor Lake
Alder Lake
Tigerlake
Ice Lake (Client)
Whiskey Lake
Cannon Lake U 0 0x6 0x6 0x6 Family 6 Model 102
Coffee Lake S, H 0 0x6 0x9 0xE Family 6 Model 158
U 0 0x6 0x8 0xE Family 6 Model 142
Kaby Lake DT, H, S, X 0 0x6 0x9 0xE Family 6 Model 158
Y, U 0 0x6 0x8 0xE Family 6 Model 142
Skylake (Client) DT, H, S 0 0x6 0x5 0xE Family 6 Model 94
Y, U 0 0x6 0x4 0xE Family 6 Model 78
Broadwell (Client) C, W 0 0x6 0x4 0x7 Family 6 Model 71
U, Y, S 0 0x6 0x3 0xD Family 6 Model 61
H 0 0x6 0x4 0x7 Family 6 Model 71
Haswell (Client) GT3E 0 0x6 0x4 0x6 Family 6 Model 70
ULT 0 0x6 0x4 0x5 Family 6 Model 69
S 0 0x6 0x3 0xC Family 6 Model 60
Ivy Bridge (Client) M, H, Gladden 0 0x6 0x3 0xA Family 6 Model 58
Sandy Bridge (Client) M, H 0 0x6 0x2 0xA Family 6 Model 42
Westmere (Client) Arrandale, Clarkdale 0 0x6 0x2 0x5 Family 6 Model 37
Nehalem (Client) Auburndale, Havendale 0 0x6 0x1 0xF Family 6 Model 31
Clarksfield 0 0x6 0x1 0xE Family 6 Model 30
Penryn (Client) Penryn, Wolfdale, Yorkfield 0 0x6 0x1 0x7 Family 6 Model 23
Core (client) Merom L 0 0x6 0x1 0x6 Family 6 Model 22
Merom 0 0x6 0x0 0xF Family 6 Model 15
Modified Pentium M Yonah 0 0x6 0x0 0xE Family 6 Model 14
Big Cores (Server)
Granite Rapids
Sapphire Rapids
Ice Lake (Server)
Cascade Lake X, SP
Skylake (Server) X, SP 0 0x6 0x5 0x5 Family 6 Model 85
Broadwell (Server) E, EP, EX 0 0x6 0x4 0xF Family 6 Model 79
DE 0 0x6 0x5 0x6 Family 6 Model 86
Haswell (Server) E, EP, EX 0 0x6 0x3 0xF Family 6 Model 63
Ivy Bridge (Server) E, EN, EP, EX 0 0x6 0x3 0xE Family 6 Model 62
Sandy Bridge (Server) E, EN, EP 0 0x6 0x2 0xD Family 6 Model 45
Westmere (Server) Gulftown, EP 0 0x6 0x2 0xC Family 6 Model 44
EX 0 0x6 0x2 0xF Family 6 Model 47
Nehalem (Server) EX 0 0x6 0x2 0xE Family 6 Model 46
Lynnfield 0 0x6 0x1 0xE Family 6 Model 30
Bloomfield, EP, WS 0 0x6 0x1 0xA Family 6 Model 26
Penryn (Server) Dunnington 0 0x6 0x1 0xD Family 6 Model 29
Harpertown, QC, Wolfdale, Yorkfield 0 0x6 0x1 0x7 Family 6 Model 23
Little Cores
Tremont 0 0x6 0x8 0x6 Family 6 Model 134
Goldmont Plus Gemini Lake 0 0x6 0x7 0xA Family 6 Model 122
Goldmont Denverton 0 0x6 0x5 0xF Family 6 Model 95
Apollo Lake, Broxton 0 0x6 0x5 0xC Family 6 Model 92
Airmont Cherry Trail, Braswell 0 0x6 0x4 0xC Family 6 Model 76
Silvermont SoFIA 0 0x6 0x5 0xD Family 6 Model 93
Anniedale 0 0x6 0x5 0xA Family 6 Model 90
Avoton, Rangeley 0 0x6 0x4 0xD Family 6 Model 77
Tangier 0 0x6 0x4 0xA Family 6 Model 74
Bay Trail 0 0x6 0x3 0x7 Family 6 Model 55
Saltwell Cedarview 0 0x6 0x3 0x6 Family 6 Model 54
Cloverview 0 0x6 0x3 0x5 Family 6 Model 53
Penwell 0 0x6 0x2 0x7 Family 6 Model 39
Bonnell Lincroft 0 0x6 0x2 0x6 Family 6 Model 38
Silverthorne, Diamondville, Pineview 0 0x6 0x1 0xC Family 6 Model 28
MIC Architecture
Knights Mill 0 0x6 0x8 0x5 Family 6 Model 133
Knights Landing 0 0x6 0x5 0x7 Family 6 Model 87
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/cpuid&oldid=76635"