From WikiChip
Difference between revisions of "intel/cpuid"
< intel

Line 7: Line 7:
 
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 
|-
 
|-
−
| rowspan="2" | {{intel|Kaby Lake|l=arch}} || {{intel|Kaby Lake Y|Y|l=core}}/{{intel|Kaby Lake U|U|l=core}} || 0 || 0x6 || 0x8 || 0xE || [[Family 6 Model 142]]
+
| rowspan="2" | {{intel|Kaby Lake|l=arch}} || {{intel|Kaby Lake DT|DT|l=core}}/{{intel|Kaby Lake H|H|l=core}}/{{intel|Kaby Lake S|S|l=core}}/{{intel|Kaby Lake X|X|l=core}} || 0 || 0x6 || 0x9 || 0xE || [[Family 6 Model 158]]
 
|-
 
|-
−
| {{intel|Kaby Lake DT|DT|l=core}}/{{intel|Kaby Lake H|H|l=core}}/{{intel|Kaby Lake S|S|l=core}}/{{intel|Kaby Lake X|X|l=core}} || 0 || 0x6 || 0x9 || 0xE || [[Family 6 Model 158]]
+
| {{intel|Kaby Lake Y|Y|l=core}}/{{intel|Kaby Lake U|U|l=core}} || 0 || 0x6 || 0x8 || 0xE || [[Family 6 Model 142]]
 
|-
 
|-
 
| rowspan="3" | {{intel|Skylake|l=arch}} || {{intel|Skylake SP|SP|l=core}} || 0 || 0x6 || 0x5 || 0x5 || [[Family 6 Model 85]]
 
| rowspan="3" | {{intel|Skylake|l=arch}} || {{intel|Skylake SP|SP|l=core}} || 0 || 0x6 || 0x5 || 0x5 || [[Family 6 Model 85]]

Revision as of 06:55, 13 July 2017

List of Intel's CPUID:


Text document with shapes.svg This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information.


Microarchitecture Core Extended Family Family Extended Model Model
Kaby Lake DT/H/S/X 0 0x6 0x9 0xE Family 6 Model 158
Y/U 0 0x6 0x8 0xE Family 6 Model 142
Skylake SP 0 0x6 0x5 0x5 Family 6 Model 85
DT/H/S/X 0 0x6 0x5 0xE Family 6 Model 94
Y/U 0 0x6 0x4 0xE Family 6 Model 78
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/cpuid&oldid=54701"