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== Overview ==
 
== Overview ==
Whiskey Lake U based processors are a single-chip solution - the chipset is packaged in the same physical casing as the CPU in a [[multi-chip package]] (MCP). Communication between the separate dies are done via a lightweight On-Package Interconnect (OPI) interface, allowing for 4 GT/s transfer rate. All Whiskey Lake U processors use {{intel|FCBGA-1528}} packages.
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=== Common Features ===
 
=== Common Features ===
All Whiskey Lake U processors have the following:
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* Dual-channel Memory
 
** Up to DDR4-2400, LPDDR3-2133
 
** 32 GiB
 
* 16x PCIe
 
* [[Quad-core]] with 8 threads
 
* Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX1, AVX2)
 
* {{intel|Turbo Boost}}, {{intel|Hyper-Threading}}, {{intel|Software Guard}}, {{intel|SpeedStep}}, {{intel|Speed Shift}}, {{intel|VT-x}}/{{intel|EPT}}, {{intel|VT-d}}, {{intel|OS Guard}}, {{intel|Flex Memory}}, {{intel|My WiFi Technology}}, and {{intel|Identity Protection Technology}}
 
* Support [[AHCI]], [[High Definition Audio]], 6x [[USB 3.0]] ports, 10x [[USB 2.0]] ports, 4x [[SATA III]], 6x [[I2C]], 3x [[UART]], 1x [[SDXC]], {{intel|CNVi}}
 
* Graphics
 
** {{intel|UHD Graphics 620}} ({{intel|Gen9.5|l=arch}} GT2)
 
** 3 independent displays supported
 
** Base frequency of 300 MHz
 
** Burst frequency of 1-1.15 GHz
 
 
 
 
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designerIntel +
first announcedJune 5, 2018 +
first launchedJuly 2018 +
instance ofcore +
isax86-64 +
isa familyx86 +
manufacturerIntel +
microarchitectureWhiskey Lake +
nametiger lake +
packageFCBGA-1528 +
process14 nm (0.014 μm, 1.4e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +