Semiconductor & Computer Engineering
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Information for "intel/cores/skylake u"
Basic information
| Display title | Skylake U - Cores - Intel |
| Default sort key | Skylake U, Intel |
| Page length (in bytes) | 5,270 |
| Page ID | 20854 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 3 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | ChipIt (talk | contribs) |
| Date of page creation | 13:21, 7 July 2017 |
| Latest editor | At32Hz (talk | contribs) |
| Date of latest edit | 08:07, 21 August 2017 |
| Total number of edits | 8 |
| Total number of distinct authors | 2 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
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| Transcluded templates (19) | Templates used on this page:
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Facts about "Skylake U - Cores - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Skylake U - Cores - Intel#package + |
| designer | Intel + |
| first announced | September 1, 2015 + |
| first launched | September 27, 2015 + |
| instance of | core + |
| isa | x86-64 + |
| main image | .png) + and .png) + |
| main image caption | 3-die config Iris Plus SKL-U (with OPC) + and 2-die config SKL-U + |
| manufacturer | Intel + |
| microarchitecture | Skylake + |
| name | Skylake U + |
| package | FCBGA-1356 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |
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