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Latest revision | Your text | ||
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: [[File:skylake de block.png|500px]] | : [[File:skylake de block.png|500px]] | ||
− | All models have all the following features in common: | + | All models have 32 [[PCIe]] lanes and have all the following features in common: |
* '''Mem:''' Up 512 GiB of quad-channel DDR4 Memory | * '''Mem:''' Up 512 GiB of quad-channel DDR4 Memory |
Facts about "Skylake DE - Cores - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Skylake DE - Cores - Intel#package + |
designer | Intel + |
first announced | February 7, 2018 + |
first launched | February 7, 2018 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
main image | + |
manufacturer | Intel + |
microarchitecture | Skylake (server) + |
name | Skylake DE + |
package | FCBGA-2518 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
word size | 64 bit (8 octets, 16 nibbles) + |