From WikiChip
Difference between revisions of "intel/cores/silverthorne"
< intel

(Overview)
(Overview)
Line 38: Line 38:
 
* {{intel|Poulsbo|l=chipset}} Chipset
 
* {{intel|Poulsbo|l=chipset}} Chipset
 
* 47,212,207 transistors
 
* 47,212,207 transistors
* 24.2 mm² die size (3.1 mm x 7.8 mm)
+
* 24.18 mm² die size (3.1 mm x 7.8 mm)
  
 
== Members ==
 
== Members ==

Revision as of 00:58, 1 April 2017

Edit Values
Silverthorne
silverthorne.png
General Info
DesignerIntel
ManufacturerIntel
IntroductionApril 2, 2008 (announced)
April 2, 2008 (launched)
Microarchitecture
ISAx86-32
MicroarchitectureBonnell
Word Size
32 bit
4 octets
8 nibbles
32
Process45 nm
0.045 μm
4.5e-5 mm
TechnologyCMOS
Clock800 MHz - 2,133.33 MHz

Silverthorne is the core name for Intel's first generation of Atom processors based on the Bonnell microarchitecture. Those ultra-low power chips were manufactured on Intel's 45 nm process and were specifically aimed for the Mobile Internet device (MID) market. Silverthorne-based processors are 32-bit x86 single core processors with TDP ranging from just 650 mW to 2.5 W.

Overview

All models are based on Bonnell manufactured on a 45 nm process and implement x86-32 with no 64-bit support.

Members

New text document.svg This section is empty; you can help add the missing info by editing this page.

See Also

designerIntel +
first announcedApril 2, 2008 +
first launchedApril 2, 2008 +
instance ofcore +
isax86-32 +
main imageFile:silverthorne.png +
manufacturerIntel +
microarchitectureBonnell +
nameSilverthorne +
process45 nm (0.045 μm, 4.5e-5 mm) +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +