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Difference between revisions of "intel/cores/hewitt lake"
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Hewitt Lake parts are branded as [[Intel]] {{intel|xeon d#D-1600 Series .28Broadwell.29|Xeon D-1600}} series processors. | Hewitt Lake parts are branded as [[Intel]] {{intel|xeon d#D-1600 Series .28Broadwell.29|Xeon D-1600}} series processors. | ||
| + | == Overview == | ||
| + | All processors are a single-socket {{intel|BGA-1667}} package, manufacturing on Intel's [[14 nm process]] based on the {{intel|Broadwell (server)|Broadwell|l=arch}} microarchitecture. Hewitt Lake processors are a single-chip solution consisting of just the processor chip itself since they incorporate the chipset along with the microprocessor die in the same package. | ||
| + | |||
| + | === Common Features === | ||
| + | All models have all the following features in common: | ||
| + | |||
| + | * '''TDP:''' 27-65 W | ||
| + | * '''Mem:''' 128 GiB dual-channel DDR4 ECC memory up to 2133/2400 MT/s. (128 GiB @ [[RDIMM]] 32 GiB/DIMM, 64 GiB @ UDIMM/SODIMM 16 GiB/DIMM | ||
| + | * '''I/O:''' 32 PCIe 3/2 lanes (x24 Gen3 + x8 Gen2) | ||
| + | * '''ISA:''' Everything up to {{x86|AVX2}} ({{x86|SMM}}, {{x86|FPU}}, {{x86|NX}}, {{x86|MMX}}, {{x86|SSE}}, {{x86|SSE2}}, {{x86|SSE3}}, {{x86|SSSE3}}, {{x86|SSE4.1}}, {{x86|SSE4.2}}, {{x86|AES}}, {{x86|AVX}}, {{x86|FMA3}}, and {{x86|AVX2}}) | ||
| + | * '''Features:''' {{intel|SpeedStep}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Secure Key}}, and {{intel|OS Guard}} | ||
| + | |||
| + | Hewitt Lake SKUs are organized into three groups: | ||
| + | |||
| + | * '''Edge Server and Cloud SUKs''' | ||
| + | * '''Integrated QuickAssist Technology''' - SKUs with Intel's {{intel|QuickAssist}} technology enabled. QAT allows for up to 100 Gps of encryption and decryption [[hardware acceleration|acceleration]]. | ||
| − | + | Additionally, SKUs are suffixed with '''N''' or combination of multiple of those options: | |
| − | + | * '''N''' - Integrated Ethernet and Intel's {{intel|QuickAssist}} technology | |
| − | {{ | ||
| − | |||
| − | |||
== Hewitt Lake Processors== | == Hewitt Lake Processors== | ||
Revision as of 11:31, 2 April 2019
| Edit Values | |
| Hewitt Lake | |
.png) | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | February 25, 2019 (announced) April 2, 2019 (launched) |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Broadwell (Server) |
| Word Size | 8 octets 64 bit16 nibbles |
| Process | 14 nm 0.014 μm 1.4e-5 mm |
| Technology | CMOS |
| Succession | |
Hewitt Lake (HWL) is codename Intel's single-chip dense low-power processors platform based on the Broadwell microarchitecture, serving as a successor to Broadwell DE. Hewitt Lake are aimed at lower power IoT, networking, and dense edge computing.
Hewitt Lake parts are branded as Intel Xeon D-1600 series processors.
Overview
All processors are a single-socket BGA-1667 package, manufacturing on Intel's 14 nm process based on the Broadwell microarchitecture. Hewitt Lake processors are a single-chip solution consisting of just the processor chip itself since they incorporate the chipset along with the microprocessor die in the same package.
Common Features
All models have all the following features in common:
- TDP: 27-65 W
- Mem: 128 GiB dual-channel DDR4 ECC memory up to 2133/2400 MT/s. (128 GiB @ RDIMM 32 GiB/DIMM, 64 GiB @ UDIMM/SODIMM 16 GiB/DIMM
- I/O: 32 PCIe 3/2 lanes (x24 Gen3 + x8 Gen2)
- ISA: Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2)
- Features: SpeedStep, VT-x, TSX, TXT, Secure Key, and OS Guard
Hewitt Lake SKUs are organized into three groups:
- Edge Server and Cloud SUKs
- Integrated QuickAssist Technology - SKUs with Intel's QuickAssist technology enabled. QAT allows for up to 100 Gps of encryption and decryption acceleration.
Additionally, SKUs are suffixed with N or combination of multiple of those options:
- N - Integrated Ethernet and Intel's QuickAssist technology
Hewitt Lake Processors
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This section is empty; you can help add the missing info by editing this page. |
See also
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Facts about "Hewitt Lake - Cores - Intel"
| designer | Intel + |
| first announced | February 25, 2019 + |
| first launched | April 2, 2019 + |
| instance of | core + |
| isa | x86-64 + |
| isa family | x86 + |
| main image | + |
| manufacturer | Intel + |
| microarchitecture | Broadwell (Server) + |
| name | Hewitt Lake + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |
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