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− | '''Cascade Lake SP''' ('''{{intel|Cascade Lake|l=arch}} Scalable Performance''') is code name for Intel's series of server [[multiprocessors]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture as part of the {{intel|Purley|l=platform}} platform serving as the successor to {{intel|Skylake SP|l=core}}. These chips support up to 8-way multiprocessing, up to [[28 cores]], incorporate a new {{x86|AVX512-VNNI|AVX512}} [[x86]] {{x86|extension}} for neural network / deep learning workloads, and introduces [[persistent memory]] support. Cascade Lake SP-based chips are manufactured on an enhanced [[14 nm process]] and utilize the {{intel|Lewisburg|l=chipset}} chipset. | + | '''Cascade Lake SP''' ('''{{intel|Cascade Lake|l=arch}} Scalable Performance''') is code name for Intel's series of server [[multiprocessors]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture as part of the {{intel|Purley|l=platform}} platform serving as the successor to {{intel|Skylake SP|l=core}}. These chips support up to 8-way multiprocessing, up to [[28 cores]], incorporate a new {{x86|AVX512-VNNI|AVX512}} [[x86]] {{x86|extension}} for neural network / deep learning workloads, and introduces [[persistent memory]] support. Cascade Lake SP-based chips are manufactured on an enhanced [[14 nm process|14nm++ process]] and utilize the {{intel|Lewisburg|l=chipset}} chipset. |
Cascade Lake SP-based models are branded as the 2nd-generation {{intel|Xeon Bronze}}, {{intel|Xeon Silver}}, {{intel|Xeon Gold}}, and {{intel|Xeon Platinum}} [[processor families]]. | Cascade Lake SP-based models are branded as the 2nd-generation {{intel|Xeon Bronze}}, {{intel|Xeon Silver}}, {{intel|Xeon Gold}}, and {{intel|Xeon Platinum}} [[processor families]]. |
Facts about "Cascade Lake SP - Cores - Intel"
chipset | Lewisburg + |
designer | Intel + |
first announced | April 2, 2019 + |
first launched | April 2, 2019 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
main image | + |
manufacturer | Intel + |
microarchitecture | Cascade Lake + |
name | Cascade Lake SP + |
package | FCLGA-3647 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | Socket P + and LGA-3647 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |