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{{comp table header|main|8:Main Processor|1:Cache|2:Memory}} | {{comp table header|main|8:Main Processor|1:Cache|2:Memory}} | ||
{{comp table header|cols|Family|Price|Launched|Cores|Threads|Frequency|Max Turbo|%TDP|L3$|Mem Type|Max Mem}} | {{comp table header|cols|Family|Price|Launched|Cores|Threads|Frequency|Max Turbo|%TDP|L3$|Mem Type|Max Mem}} | ||
+ | {{comp table header|lsep|25:[[Uniprocessors]] (1-way)}} | ||
+ | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Cascade Lake R]] [[max cpu count::1]] | ||
+ | |?full page name | ||
+ | |?model number | ||
+ | |?microprocessor family | ||
+ | |?release price | ||
+ | |?first launched | ||
+ | |?core count | ||
+ | |?thread count | ||
+ | |?base frequency#GHz | ||
+ | |?turbo frequency (1 core)#GHz | ||
+ | |?tdp | ||
+ | |?l3$ size | ||
+ | |?supported memory type | ||
+ | |?max memory#TiB | ||
+ | |format=template | ||
+ | |template=proc table 3 | ||
+ | |userparam=13 | ||
+ | |mainlabel=- | ||
+ | |limit=75 | ||
+ | |valuesep=, | ||
+ | |sort=model number | ||
+ | }} | ||
{{comp table header|lsep|25:[[Multiprocessors]] (2-way)}} | {{comp table header|lsep|25:[[Multiprocessors]] (2-way)}} | ||
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Cascade Lake R]] [[max cpu count::2]] | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Cascade Lake R]] [[max cpu count::2]] |
Facts about "Cascade Lake R - Cores - Intel"
chipset | Lewisburg + |
designer | Intel + |
first announced | February 24, 2020 + |
first launched | February 24, 2020 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
main image | + |
manufacturer | Intel + |
microarchitecture | Cascade Lake + |
name | Cascade Lake R + |
package | FCLGA-3647 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | Socket P + and LGA-3647 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |