Editing intel/cores/cascade lake ap

{{intel title|Cascade Lake AP|core}}
{{core
|name=Cascade Lake AP
|image=cascade lake ap (front).png
|developer=Intel
|manufacturer=Intel
|isa=x86-64
|microarch=Cascade Lake
|platform=Walker Pass
|word=64 bit
|proc=14 nm
|tech=CMOS
|package name 1=intel,fcbga_5903
}}
'''Cascade Lake AP''' ('''CLX-AP''', '''Cascade Lake Advanced Performance''') is code name for a series of high core-count multi-chip packaged server [[multiprocessors]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture part of the {{intel|Walker Pass|l=platform}} platform.

Cascade Lake AP-based processors are branded as {{intel|Xeon Platinum}} 9200-series.

== Overview ==
Cascade Lake AP comprise of two {{intel|Cascade Lake|l=arch}} dies packaged together a single BGA-5903 substrate. Those processors support up to 56 cores, 112 threads, and up to 12 DDR4 channels.

Cascade Lake AP processors cannot be purchased individually. Instead, they can only be bought as part of the S9200WK compute module (essentially a complete system designed by Intel).

=== Common Features ===
* 12-channel memory
** UP to DDR4-2933 MT/s
** ECC support
* '''TDP:''' 250 W to 400 W
* '''PCIe:''' x40 Lanes of PCIe Gen 3 (limited by the S9200WK module, actual models support more lanes but are not sold independently)
* '''ISA:''' Everything up to {{x86|AVX-512}} (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, {{x86|AVX512DQ}}, {{x86|AVX512VL}}, {{x86|AVX512VNNI}})
* '''Features:''' {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}

{{clear}}

== Cascade Lake AP Processors==
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           Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
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{{comp table start}}
<table class="comptable sortable tc3 tc4 tc5 tc6 tc7 tc8">
{{comp table header|main|11:List of Cascade Lake AP-based Processors}}
{{comp table header|cols|Launched|Cores|Threads|TDP|L2|L3|%Frequency|%Turbo}}
{{#ask: [[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]
 |?full page name
 |?model number
 |?first launched
 |?core count
 |?thread count
 |?tdp
 |?l2$ size
 |?l3$ size
 |?base frequency#GHz
 |?turbo frequency (1 core)#GHz
 |format=template
 |template=proc table 3
 |userparam=10
 |sort=model number
 |mainlabel=-
}}
{{comp table count|ask=[[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]}}
</table>
{{comp table end}}

=== SKU Comparison ===
Below are a number of SKU comparison graphs based on their specifications.

<div style="float: left; margin: 10px">
{{#ask: [[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]
 |?core count
 |?base frequency
 |charttitle=Cores vs. Frequency
 |numbersaxislabel=Frequency (MHz)
 |labelaxislabel=Core Count
 |height=400
 |width=400
 |theme=vector
 |group=property
 |grouplabel=subject
 |charttype=scatter
 |format=jqplotseries
 |mainlabel=-
}}
</div>

<div style="float: left; margin: 10px">
{{#ask: [[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]
 |?core count
 |?turbo frequency (1 core)
 |charttitle=Cores vs. Turbo Frequency
 |numbersaxislabel=Frequency (MHz)
 |labelaxislabel=Core Count
 |height=400
 |width=400
 |theme=vector
 |group=property
 |grouplabel=subject
 |charttype=scatter
 |format=jqplotseries
 |mainlabel=-
}}
</div>

<div style="float: left; margin: 10px">
{{#ask: [[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]
 |?core count
 |?tdp
 |charttitle=Cores vs. TDP
 |numbersaxislabel=TDP (W)
 |labelaxislabel=Core Count
 |height=400
 |width=400
 |theme=vector
 |group=property
 |grouplabel=subject
 |charttype=scatter
 |format=jqplotseries
 |mainlabel=-
}}
</div>

<div style="float: left; margin: 10px">
{{#ask: [[Category:microprocessor models by intel]] [[core name::Cascade Lake AP]]
 |?turbo frequency (1 core)
 |?tdp
 |charttitle=Frequency vs. TDP
 |numbersaxislabel=TDP (W)
 |labelaxislabel=Frequency (MHz)
 |height=400
 |width=400
 |theme=vector
 |group=property
 |grouplabel=subject
 |charttype=scatter
 |format=jqplotseries
 |mainlabel=-
}}
</div>

{{clear}}

== Documents ==
* [[:File:S9200WK-Reference-Design-Guide.pdf|S9200WK reference design guide]]

== See also ==
{{intel cascade lake core see also}}
designer	Intel +
instance of	core +
isa	x86-64 +
main image	+
manufacturer	Intel +
microarchitecture	Cascade Lake +
name	Cascade Lake AP +
package	FCBGA-5903 +
platform	Walker Pass +
process	14 nm (0.014 μm, 1.4e-5 mm) +
technology	CMOS +
word size	64 bit (8 octets, 16 nibbles) +