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=== Kaby Lake ===
 
=== Kaby Lake ===
 
{{see also|intel/microarchitectures/kaby lake|intel/cores/kaby lake x|l1=Kaby Lake µarch|l2=Kaby Lake X core}}
 
{{see also|intel/microarchitectures/kaby lake|intel/cores/kaby lake x|l1=Kaby Lake µarch|l2=Kaby Lake X core}}
Kaby Lake-based Core X processors were introduced at Computex 2017 at the same time as the Skylake models. Despite that, those processors are far more similar to the high-end {{intel|Core i7}} ({{intel|Kaby Lake S|l=core}} core) contemporaries in terms of features and capabilities vs the Skylake Core X variants. Likewise, they do not incorporate some of the more significant features such as a high core count, the cache hierarchy, and {{x86|AVX-512}}. Additionally, those processors only support dual-channel memory.
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Kaby Lake-based Core X processors were introduced at Computex 2017 at the same time as the Skylake models. Despite that, those processors are far more similar to the high-end {{intel|Core i7}} ({{intel|Kaby Lake S|l=core}} core) contemporaries in terms of features and capabilities vs the Skylake Core X variants. Likewise, they do not incorporate some of the more significant features such as a high core count, the new cache system, and {{x86|AVX-512}}.
  
 
* '''TDP:''' 112 W
 
* '''TDP:''' 112 W

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Facts about "Core X - Intel"
designerIntel +
first announcedMay 30, 2017 +
full page nameintel/core x +
instance ofmicroprocessor family +
main designerIntel +
manufacturerIntel +
microarchitectureSkylake + and Kaby Lake +
nameCore X +
packageFCLGA-2066 +
process14 nm (0.014 μm, 1.4e-5 mm) +
socketSocket R +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +