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Difference between revisions of "intel/core i7ee/i7-6950x"
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== Features ==
 
== Features ==
{{mpu features
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{{x86 features
 
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| nx          = Yes

Revision as of 15:46, 13 December 2017

Template:mpu The Core i7-6950X Extreme Edition is a 64-bit deca-core top-of-the-line MPU introduced by Intel for the enthusiasts market in mid-2016. The i7-6950X replaced the i7-5960X as Intel's flagship microprocessor based on Broadwell microarchitecture - also becoming the first consumer-class deca-core microprocessor.

Cache

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 320 KiB
327,680 B
0.313 MiB
10x32 KiB 8-way set associative (per core)
L1D$ 320 KiB
327,680 B
0.313 MiB
10x32 KiB 8-way set associative (per core)
L2$ 2.5 MiB
2,560 KiB
2,621,440 B
0.00244 GiB
10x256 KiB 8-way set associative (per core)
L3$ 25 MiB
25,600 KiB
26,214,400 B
0.0244 GiB
10x2.5 MiB 20-way set associative (shared)

Graphics

This processor has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR4-2133, DDR4-2400
Controllers 1
Channels 4
ECC Support No
Max bandwidth 76.8 GB/s
Bandwidth (single) 19,200 MB/s
Bandwidth (dual) 38,400 MB/s
Bandwidth (quad) 76,800 MB/s
Max memory 128 GiB

Expansions

Template:mpu expansions

Features

Die Shot

  • 3,400,000,000 transistors
  • 246 mm2
broadwell (deca-core) die shot.png


broadwell (deca-core) die shot (annotated).png

Documents

See also

has advanced vector extensionstrue +
has advanced vector extensions 2true +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Turbo Boost Max Technology 3.0 +, Enhanced SpeedStep Technology + and Extended Page Tables +
has intel enhanced speedstep technologytrue +
has intel turbo boost max technology 3 0true +
has intel turbo boost technology 2 0true +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
l1d$ description8-way set associative +
l1d$ size320 KiB (327,680 B, 0.313 MiB) +
l1i$ description8-way set associative +
l1i$ size320 KiB (327,680 B, 0.313 MiB) +
l2$ description8-way set associative +
l2$ size2.5 MiB (2,560 KiB, 2,621,440 B, 0.00244 GiB) +
l3$ description20-way set associative +
l3$ size25 MiB (25,600 KiB, 26,214,400 B, 0.0244 GiB) +