From WikiChip
Difference between revisions of "intel/core i7/i7-7800x"
< intel‎ | core i7

m (Bot: Automated text replacement (-skylake#Memory_Hierarchy +skylake_(server)#Memory_Hierarchy))
(One intermediate revision by the same user not shown)
Line 15: Line 15:
 
|locked=No
 
|locked=No
 
|frequency=3,500 MHz
 
|frequency=3,500 MHz
|turbo frequency1=4,300 MHz
+
|turbo frequency1=4,000 MHz
 
|bus type=DMI 3.0
 
|bus type=DMI 3.0
 
|bus links=4
 
|bus links=4
Line 40: Line 40:
 
|turbo frequency=Yes
 
|turbo frequency=Yes
 
}}
 
}}
'''Core i7-7800X''' is a {{arch|64}} [[hexa-core]] high-performance [[x86]] desktop microprocessor introduced by [[Intel]] in mid-[[2017]].  This chip, which is based on the {{intel|Skylake|l=arch}} microarchitecture, is fabricated on Intel's enhanced [[14 nm process|14nm+ process]]. The i7-7800X operates at 3.5 GHz with a TDP of 140 W and a {{intel|Turbo Boost}} frequency of 4.3 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2400 memory.
+
'''Core i7-7800X''' is a {{arch|64}} [[hexa-core]] high-performance [[x86]] desktop microprocessor introduced by [[Intel]] in mid-[[2017]].  This chip, which is based on the {{intel|Skylake|l=arch}} microarchitecture, is fabricated on Intel's enhanced [[14 nm process|14nm+ process]]. The i7-7800X operates at 3.5 GHz with a TDP of 140 W and a {{intel|Turbo Boost}} frequency of 4 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2400 memory.
  
 
== Cache ==
 
== Cache ==

Revision as of 06:07, 28 July 2017

Template:mpu Core i7-7800X is a 64-bit hexa-core high-performance x86 desktop microprocessor introduced by Intel in mid-2017. This chip, which is based on the Skylake microarchitecture, is fabricated on Intel's enhanced 14nm+ process. The i7-7800X operates at 3.5 GHz with a TDP of 140 W and a Turbo Boost frequency of 4 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2400 memory.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$384 KiB
393,216 B
0.375 MiB
L1I$192 KiB
196,608 B
0.188 MiB
6x32 KiB8-way set associative 
L1D$192 KiB
196,608 B
0.188 MiB
6x32 KiB8-way set associativewrite-back

L2$6 MiB
6,144 KiB
6,291,456 B
0.00586 GiB
  6x1 MiB16-way set associativewrite-back

L3$8.25 MiB
8,448 KiB
8,650,752 B
0.00806 GiB
  6x1.375 MiB11-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2400
Supports ECCNo
Channels4
Max Bandwidth79.47 GiB/s
81,377.28 MiB/s
85.33 GB/s
85,330.263 MB/s
0.0776 TiB/s
0.0853 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s
Quad 71.53 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes28
Configs1x16+1x8+1x4, 3x8+1x4


Graphics

This processor has no integrated graphics.

Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
AVX-512Advanced Vector 512-bit
AVX512FAVX-512 Foundation
AVX512CDAVX-512 Conflict Detection
AVX512BWAVX-512 Byte and Word
AVX512DQAVX-512 Doubleword and Quadword Instructions
AVX512VLAVX-512 Vector Length
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Facts about "Core i7-7800X - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i7-7800X - Intel#io +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions + and Software Guard Extensions +
has intel enhanced speedstep technologytrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
l1$ size384 KiB (393,216 B, 0.375 MiB) +
l1d$ description8-way set associative +
l1d$ size192 KiB (196,608 B, 0.188 MiB) +
l1i$ description8-way set associative +
l1i$ size192 KiB (196,608 B, 0.188 MiB) +
l2$ description16-way set associative +
l2$ size6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
l3$ description11-way set associative +
l3$ size8.25 MiB (8,448 KiB, 8,650,752 B, 0.00806 GiB) +
max memory bandwidth79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) +
max memory channels4 +
max pcie lanes28 +
supported memory typeDDR4-2400 +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +