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Difference between revisions of "intel/core i7/i7-6498du"
< intel‎ | core i7

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{{intel title|Core i7-6498DU}}
 
{{intel title|Core i7-6498DU}}
 
{{mpu
 
{{mpu
| name               = Intel Core i7-6498DU
+
| name               = Intel Core i7-6498DU
| no image           = Yes
+
| no image           = Yes
| image             =  
+
| image               =  
| image size         =  
+
| image size         =  
| caption            =  
+
| caption             =
| manufacturer       = Intel
+
| designer           = Intel
| model number       = i7-6498DU
+
| manufacturer       = Intel
| part number       = FJ8066201930413
+
| model number       = i7-6498DU
| market             = Mobile
+
| part number         = FJ8066201930413
| first announced   = December 27, 2015
+
| market             = Mobile
| first launched     =  
+
| first announced     = December 27, 2015
| last order         =  
+
| first launched     = 2016
| last shipment     =  
+
| last order         =  
 +
| last shipment       =
 +
| release price      = $393
  
| family             = Core i7
+
| family             = Core i7
| series             = 6000
+
| series             = 6000DU
| locked             = Yes
+
| locked             = Yes
| frequency         = 2500 MHz
+
| frequency           = 2,500 MHz
| turbo frequency   =  
+
| turbo frequency     = 3,100 MHz
| turbo frequency1  =  
+
| bus type            = DMI 3.0
| turbo frequency2  =  
+
| bus speed          =  
| turbo frequency3  =
+
| bus rate            = 8.0 GT/s
| turbo frequency4  =  
+
| bus links           =  
| bus type           =
+
| clock multiplier   = 25
| bus speed          =  
+
| s-spec             = SR2NS
| clock multiplier   = 25
+
| s-spec qs          =
| s-spec             = SR2NS
+
| cpuid              =
  
| microarch         = Skylake
+
| microarch           = Skylake
| platform          =  
+
| platform           =
| core name         =  
+
| chipset            =
| core stepping     =  
+
| core name           = Skylake U
| process           = 14 nm
+
| core family        =
| die size           =  
+
| core model         =  
| word size         = 64 bit
+
| core stepping       =  
| core count         = 2
+
| process             = 14 nm
| thread count       = 4
+
| transistors        =
| max cpus           = 1
+
| technology          = CMOS
| max memory         = 32 GB
+
| die area            = <!-- XX mm² -->
 +
| die width           =
 +
| die length          =  
 +
| word size           = 64 bit
 +
| core count         = 2
 +
| thread count       = 4
 +
| max cpus           = 1
 +
| max memory         = 32 GiB
 +
| max memory addr    =
  
| electrical         = Yes
+
| electrical         = Yes
| tdp               = 65 W
+
| v core              =
| ctdp down         =  
+
| v core tolerance    =
| ctdp up            =
+
| v io                =
| temp max          = 100 C
+
| v io tolerance      =
| temp min           =  
+
| sdp                =
 +
| tdp                 = 15 W
 +
| tdp typical        =
 +
| ctdp down          = 7.5 W
 +
| ctdp down frequency = 800 MHz
 +
| ctdp up            = 25 W
 +
| ctdp up frequency  = 2,600 MHz
 +
| temp min           =  
 +
| temp max            =
 +
| tjunc min          =
 +
| tjunc max          =
 +
| tcase min          = 0 °C
 +
| tcase max          = 100 °C
 +
| tstorage min        =
 +
| tstorage max        =
 +
| tambient min       =
 +
| tambient max        =  
  
| packaging         =  
+
| packaging           = Yes
| package           =  
+
| package 0          = FCBGA-1356
| package type       =  
+
| package 0 type     = FCBGA
| package pitch     =  
+
| package 0 pins      = 1356
| package size      =  
+
| package 0 pitch     = 0.65 mm
| socket             =  
+
| package 0 width    = 42 mm
| socket type       =  
+
| package 0 length    = 24 mm
 +
| package 0 height    = 1.3 mm
 +
| socket 0            = BGA-1356
 +
| socket 0 type       = BGA
 
}}
 
}}
The '''Intel Core i7-6498DU''' is a [[dual core]] [[64-bit architecture|64-bit]] mobile [[microprocessor]] set to release by [[Intel]] in 2016. The microprocessor is based on the [[Skylake]] [[microarchitecture]] using 14nm process.
+
'''Core i7-6498DU''' is a {{arch|64}} [[dual core]] [[x86]] performance mobile [[microprocessor]] introduced by [[Intel]] in early 2016. This processor operates at base frequency of 2.5 GHz with a turbo frequency of 3.1 GHz for a single active core. The processor incorporates Intel's {{intel|HD Graphics 510}} [[GPU]] operating at 300 MHz with a boost frequency of 1.05 GHz. This model has a TDP of 15 W with a configurable TDP-up of 25 W (2.6 GHz) and a configurable TDP-down of 7.5 W (800 MHz). The chip is based on the {{intel|Skylake|l=arch}} [[microarchitecture]] and is manufactured on a [[14 nm process]].
  
{{unknown features}}
+
== Cache ==
 
+
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 
+
{{cache info
{{stub}}
+
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1i extra=(per core, write-back)
 +
|l1d cache=64 KiB
 +
|l1d break=2x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d extra=(per core, write-back)
 +
|l2 cache=512 KiB
 +
|l2 break=2x256 KiB
 +
|l2 desc=4-way set associative
 +
|l2 extra=(per core, write-back)
 +
|l3 cache=4 MiB
 +
|l3 desc=16-way set associative
 +
|l3 extra=(shared)
 +
}}

Revision as of 11:55, 24 November 2016

Template:mpu Core i7-6498DU is a 64-bit dual core x86 performance mobile microprocessor introduced by Intel in early 2016. This processor operates at base frequency of 2.5 GHz with a turbo frequency of 3.1 GHz for a single active core. The processor incorporates Intel's HD Graphics 510 GPU operating at 300 MHz with a boost frequency of 1.05 GHz. This model has a TDP of 15 W with a configurable TDP-up of 25 W (2.6 GHz) and a configurable TDP-down of 7.5 W (800 MHz). The chip is based on the Skylake microarchitecture and is manufactured on a 14 nm process.

Cache

Main article: Skylake § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
2x32 KiB 8-way set associative (per core, write-back)
L1D$ 64 KiB
65,536 B
0.0625 MiB
2x32 KiB 8-way set associative (per core, write-back)
L2$ 512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
2x256 KiB 4-way set associative (per core, write-back)
L3$ 4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
16-way set associative (shared)
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description16-way set associative +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +