Template:mpu Core i5-8500B is a 64-bit hexa-core mid-range performance x86 microprocessor set to be introduced by Intel in 2018. This processor, which is based on the Coffee Lake microarchitecture, is manufactured on Intel's 3rd generation enhanced 14nm++ process.

Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache

Main article: Coffee Lake § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 386 KiB 395,264 B 0.377 MiB L1I$ 192 KiB 196,608 B 0.188 MiB 6x32 KiB 8-way set associative   L1D$ 192 KiB 196,608 B 0.188 MiB 6x32 KiB 8-way set associative write-back L2$ 1.5 MiB 1,536 KiB 1,572,864 B 0.00146 GiB     6x256 KiB 4-way set associative write-back L3$ 9 MiB 9,216 KiB 9,437,184 B 0.00879 GiB     6x1.5 MiB 12-way set associative write-back