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Facts about "Core i5-580M - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i5-580M - Intel#package + and Core i5-580M - Intel#io + |
base frequency | 2,666.66 MHz (2.667 GHz, 2,666,660 kHz) + |
bus links | 1 + |
bus rate | 2,500 MT/s (2.5 GT/s, 2,500,000 kT/s) + |
bus type | DMI 1.0 + |
chipset | Ibex Peak + |
clock multiplier | 20 + |
core count | 2 + |
core family | 6 + |
core model | 37 + |
core name | Arrandale + |
core stepping | K0 + |
cpuid | 0x20655 + |
designer | Intel + |
device id | 0x0046 + |
die area | 81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) + |
family | Core i5 + |
first announced | September 26, 2010 + |
first launched | September 26, 2010 + |
full page name | intel/core i5/i5-580m + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 1.0 +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Flex Memory Access +, Enhanced SpeedStep Technology + and Extended Page Tables + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 1 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics (Ironlake) + |
integrated gpu base frequency | 500 MHz (0.5 GHz, 500,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 12 + |
integrated gpu max frequency | 766 MHz (0.766 GHz, 766,000 KHz) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
last order | April 5, 2012 + |
last shipment | October 8, 2012 + |
ldate | September 26, 2010 + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 378.15 K (105 °C, 221 °F, 680.67 °R) + |
max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
max memory bandwidth | 15.88 GiB/s (16,261.12 MiB/s, 17.051 GB/s, 17,051.02 MB/s, 0.0155 TiB/s, 0.0171 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 16 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Westmere + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | i5-580M + |
name | Intel Core i5-580M + |
package | rPGA-988A + and BGA-1288 + |
part number | BX80617I5580M +, CN80617005487AD + and CP80617005487AD + |
platform | Calpella + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |
release price | $ 266.00 (€ 239.40, £ 215.46, ¥ 27,485.78) + |
s-spec | SLC28 + and SLC29 + |
series | i5-500 + |
smp max ways | 1 + |
supported memory type | DDR3-1066 + |
tdp | 35 W (35,000 mW, 0.0469 hp, 0.035 kW) + |
technology | CMOS + |
thread count | 4 + |
transistor count | 382,000,000 + |
turbo frequency (1 core) | 3,333.33 MHz (3.333 GHz, 3,333,330 kHz) + |
turbo frequency (2 cores) | 3,066.66 MHz (3.067 GHz, 3,066,660 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |