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=== Desktop (Coffee Lake)===
 
=== Desktop (Coffee Lake)===
 
{{see also|intel/cores/coffee lake s|l1=Coffee Lake S}}
 
{{see also|intel/cores/coffee lake s|l1=Coffee Lake S}}
{{intel|Coffee Lake|l=arch}}-based Core i5s were introduced in late 2017 with a number of high-end SKUs. A larger number of SKUs were introduced in April 2018. Although they still use standard {{intel|LGA-1151|Socket LGA-1151}}, those parts are no longer backwards compatible with earlier 100/200-series [[chipsets]] and must be paired with an appropriate {{intel|300-series chipset}}. A significant configuration change has taken place with the introduction of Coffee Lake including bumping the core count for the Core i5s from [[4 cores]] to [[6 cores|6]] and appropriately increasing the [[L3 cache]] which has significantly increased the performance of those parts over the prior generation. Note that with the doubling of the core, Intel has dropped {{intel|hyper-threading}} support from those models. All models have the following features in common:
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{{intel|Coffee Lake|l=arch}}-based Core i5s were introduced in late 2017 with a number of high-end SKUs. A larger number of SKUs were introduced in April 2018. Although they still use standard {{intel|LGA-1151|Socket LGA-1151}}, those parts are no longer backwards compatible with earlier 100/200-series [[chipsets]] and must be paired with an appropriate {{intel|300-series chipset}}. A significant configuration change has taken place with the introduction of Coffee Lake including bumping the core count for the Core i5s from [[4 cores]] to [[6 cores|6]] and appropriatly increasing the [[L3 cache]] which has signficantly increased the performance of those parts over the prior generation. Note that with the doubling of the core, Intel has dropped {{intel|hyper-threading}} support from those models. All models have the following features in common:
  
 
* [[Hexa-core]] without {{intel|Hyper-threading}}, 9 MiB [[L3$]]
 
* [[Hexa-core]] without {{intel|Hyper-threading}}, 9 MiB [[L3$]]

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Facts about "Core i5 - Intel"
designerIntel +
first announcedJune 17, 2009 +
first launchedSeptember 2009 +
full page nameintel/core i5 +
instance ofmicroprocessor family +
instruction set architectureIA-32 + and x86-64 +
main designerIntel +
manufacturerIntel +
microarchitectureNehalem +, Westmere +, Sandy Bridge +, Ivy Bridge +, Haswell +, Broadwell +, Skylake +, Kaby Lake +, Coffee Lake + and Ice Lake +
nameIntel Core i5 +
packageFCBGA-1440 +, FCBGA-1364 +, FCBGA-1288 +, FCBGA-1168 +, FCLGA-1155 +, FCLGA-1151 +, FCLGA-1150 +, FCBGA-1023 +, FCPGA-988 + and FCPGA-946 +
process45 nm (0.045 μm, 4.5e-5 mm) +, 32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) +
socketLGA-1151 +, LGA-1150 +, LGA-1155 +, LGA-1156 +, Socket G1 +, Socket G2 + and Socket G3 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +