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Difference between revisions of "intel/core i3/i3-330e"
< intel‎ | core i3

Line 38: Line 38:
 
| core model          = 37
 
| core model          = 37
 
| core stepping      = C2
 
| core stepping      = C2
| core stepping       = K0
+
| core stepping 2    = K0
 
| process            = 32 nm
 
| process            = 32 nm
 
| transistors        = 382,000,000
 
| transistors        = 382,000,000
Line 104: Line 104:
 
|bandwidth dchan=15.88 GiB/s
 
|bandwidth dchan=15.88 GiB/s
 
|pae=36 bit
 
|pae=36 bit
 +
}}
 +
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 2.0
 +
| pcie lanes        = 16
 +
| pcie config        = 1x16
 +
| pcie config 2      = 2x8
 
}}
 
}}

Revision as of 00:12, 1 December 2016

Template:mpu Core i3-330E is a 64-bit dual-core x86 mobile microprocessor introduced by Intel in 2010. This processor operates at a frequency of 2.13 GHz and a TDP of 35 W. This MPU is manufactured on a 32 nm process based on the Westmere microarchitecture (Arrandale core). This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 667.00 MHz.

Cache

Main article: Westmere § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
L1I$64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
2x32 KiB4-way set associativewrite-back
L1D$64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
2x32 KiB8-way set associativewrite-back

L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back

L3$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  2x1.5 MiB12-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1066
Supports ECCNo
Max Mem8 GiB
Controllers1
Channels2
Max Bandwidth15.88 GiB/s
27.631 GB/s
16,261.12 MiB/s
0.0155 TiB/s
0.0171 TB/s
Bandwidth
Single 7.942 GiB/s
Double 15.88 GiB/s
Physical Address (PAE)36 bit

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.0
Max Lanes16
Configs1x16, 2x8
Facts about "Core i3-330E - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i3-330E - Intel#io +
has ecc memory supportfalse +
l1$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l1d$ description8-way set associative +
l1d$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
l1i$ description4-way set associative +
l1i$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description12-way set associative +
l3$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
max memory bandwidth15.88 GiB/s (27.631 GB/s, 16,261.12 MiB/s, 0.0155 TiB/s, 0.0171 TB/s) +
max memory channels2 +
max pcie lanes16 +
supported memory typeDDR3-1066 +