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Display titleCeleron P4500 - Intel
Default sort keyCeleron P4500, Intel
Page length (in bytes)4,440
Page ID11819
Page content languageEnglish (en)
Page content modelwikitext
Indexing by robotsAllowed
Number of redirects to this page8
Counted as a content pageYes
Number of subpages of this page0 (0 redirects; 0 non-redirects)

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Page creatorAt32Hz (talk | contribs)
Date of page creation00:16, 1 December 2016
Latest editorChippyBot (talk | contribs)
Date of latest edit16:16, 13 December 2017
Total number of edits14
Total number of distinct authors3
Recent number of edits (within past 90 days)0
Recent number of distinct authors0

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Retrieved from "https://en.wikichip.org/wiki/intel/celeron/p4500"
Facts about "Celeron P4500 - Intel"
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Celeron P4500 - Intel#package + and Celeron P4500 - Intel#io +
base frequency1,866.66 MHz (1.867 GHz, 1,866,660 kHz) +
bus links1 +
bus rate2,500 MT/s (2.5 GT/s, 2,500,000 kT/s) +
bus typeDMI 1.0 +
chipsetIbex Peak +
clock multiplier14 +
core count2 +
core family6 +
core model37 +
core nameArrandale +
core steppingC2 +
cpuid0x20655 +
designerIntel +
device id0x0046 +
die area81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) +
familyCeleron +
first announcedMarch 28, 2010 +
first launchedMarch 28, 2010 +
full page nameintel/celeron/p4500 +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureEnhanced SpeedStep Technology +, Extended Page Tables + and Flex Memory Access +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
instance ofmicroprocessor +
integrated gpuHD Graphics (Ironlake) +
integrated gpu base frequency500 MHz (0.5 GHz, 500,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units12 +
integrated gpu max frequency667 MHz (0.667 GHz, 667,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description4-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description8-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldateMarch 28, 2010 +
manufacturerIntel +
market segmentMobile + and Embedded +
max cpu count1 +
max junction temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth15.88 GiB/s (16,261.12 MiB/s, 17.051 GB/s, 17,051.02 MB/s, 0.0155 TiB/s, 0.0171 TB/s) +
max memory channels2 +
max pcie lanes16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureWestmere +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberP4500 +
nameIntel Celeron P4500 +
packagerPGA-988A +
part numberCP80617004803AA +
platformCalpella +
process32 nm (0.032 μm, 3.2e-5 mm) +
s-specSLBNL +
seriesP4000 +
smp max ways1 +
supported memory typeDDR3-1066 +
tdp35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technologyCMOS +
thread count2 +
transistor count382,000,000 +
word size64 bit (8 octets, 16 nibbles) +