From WikiChip
Celeron B800 - Intel
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Celeron B800 | |||||||||||
General Info | |||||||||||
Designer | Intel | ||||||||||
Manufacturer | Intel | ||||||||||
Model Number | B800 | ||||||||||
Part Number | FF8062701142600 | ||||||||||
S-Spec | SR0EW | ||||||||||
Market | Mobile | ||||||||||
Introduction | June, 2011 (announced) June, 2011 (launched) | ||||||||||
Release Price | $80.00 | ||||||||||
Shop | Amazon | ||||||||||
General Specs | |||||||||||
Family | Celeron | ||||||||||
Series | 800 | ||||||||||
Locked | Yes | ||||||||||
Frequency | 1,500 MHz | ||||||||||
Bus type | DMI 2.0 | ||||||||||
Bus rate | 4 × 5 GT/s | ||||||||||
Clock multiplier | 15 | ||||||||||
CPUID | 0x206A7 | ||||||||||
Microarchitecture | |||||||||||
ISA | x86-64 (x86) | ||||||||||
Microarchitecture | Sandy Bridge | ||||||||||
Platform | Sandy Bridge M | ||||||||||
Chipset | Cougar Point | ||||||||||
Core Name | Sandy Bridge M | ||||||||||
Core Family | 6 | ||||||||||
Core Model | 42 | ||||||||||
Core Stepping | Q0 | ||||||||||
Process | 32 nm | ||||||||||
Transistors | 504,000,000 | ||||||||||
Technology | CMOS | ||||||||||
Die | 131 mm² | ||||||||||
Word Size | 64 bit | ||||||||||
Cores | 2 | ||||||||||
Threads | 2 | ||||||||||
Max Memory | 16 GiB | ||||||||||
Multiprocessing | |||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||
Electrical | |||||||||||
Power (idle) | 3.1 W | ||||||||||
Vcore | 0.3 V-1.52 V | ||||||||||
TDP | 35 W | ||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||
Packaging | |||||||||||
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Celeron B800 is a dual-core budget mobile x86 microprocessor introduced by Intel in mid-2011. The Celeron B800, which is based on the Sandy Bridge microarchitecture and is manufactured on a 32 nm process, operates at 1.5 GHz with a TDP of 35 W. This chip incorporates Intel's HD Graphics integrated graphics operating at 650 MHz with a burst frequency of 1 GHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.
Contents
Cache
- Main article: Sandy Bridge § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options |
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Graphics
Integrated Graphics Information
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[Edit] Sandy Bridge (Gen6) Hardware Accelerated Video Capabilities | |||||||
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Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | ✘ | Main | Main, High | Up to 80 Mbps | |||
MPEG-4 AVC (H.264) | Main | 4.1 | Up to 40 Mbps | Main, High | 4.1 | Up to 40 Mbps | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | Up to 40 Mbps |
Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Documents
Datasheet
Other
Facts about "Celeron B800 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron B800 - Intel#package + and Celeron B800 - Intel#pcie + |
base frequency | 1,500 MHz (1.5 GHz, 1,500,000 kHz) + |
bus links | 4 + |
bus rate | 5,000 MT/s (5 GT/s, 5,000,000 kT/s) + |
bus type | DMI 2.0 + |
chipset | Cougar Point + |
clock multiplier | 15 + |
core count | 2 + |
core family | 6 + |
core model | 42 + |
core name | Sandy Bridge M + |
core stepping | Q0 + |
core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
core voltage (min) | 0.3 V (3 dV, 30 cV, 300 mV) + |
cpuid | 0x206A7 + |
designer | Intel + |
device id | 0x0106 + |
die area | 131 mm² (0.203 in², 1.31 cm², 131,000,000 µm²) + |
family | Celeron + |
first announced | June 2011 + |
first launched | June 2011 + |
full page name | intel/celeron/b800 + |
has ecc memory support | false + |
has feature | Intel VT-x +, Flex Memory Access + and Enhanced SpeedStep Technology + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics (Sandy Bridge) + |
integrated gpu base frequency | 650 MHz (0.65 GHz, 650,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 6 + |
integrated gpu max frequency | 1,000 MHz (1 GHz, 1,000,000 KHz) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 8-way set associative + |
l3$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
ldate | June 2011 + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) + |
max memory bandwidth | 19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) + |
max memory channels | 2 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Sandy Bridge + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | B800 + |
name | Celeron B800 + |
package | rPGA988B + |
part number | FF8062701142600 + |
platform | Sandy Bridge M + |
power dissipation (idle) | 3.1 W (3,100 mW, 0.00416 hp, 0.0031 kW) + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |
release price | $ 80.00 (€ 72.00, £ 64.80, ¥ 8,266.40) + |
s-spec | SR0EW + |
series | 800 + |
smp max ways | 1 + |
socket | Socket G2 + |
supported memory type | DDR3-1333 + and DDR3-1066 + |
tdp | 35 W (35,000 mW, 0.0469 hp, 0.035 kW) + |
technology | CMOS + |
thread count | 2 + |
transistor count | 504,000,000 + |
word size | 64 bit (8 octets, 16 nibbles) + |