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Latest revision as of 01:12, 15 August 2019

Edit Values
Atom C3508
denverton (front).png
General Info
Model NumberC3508
Part NumberHW8076503693501
MarketServer, Embedded
IntroductionAugust 15, 2017 (announced)
August 15, 2017 (launched)
General Specs
Frequency1,600 MHz
Clock multiplier16
ISAx86-64 (x86)
Core NameDenverton
Core Family6
Core Model95
Core SteppingB1
Process14 nm
Word Size64 bit
Max CPUs1 (Uniprocessor)
Max Memory256 GiB
TDP11.25 W
Tjunction0 °C – 100 °C
Tcase0 °C – 90 °C
Tstorage-25 °C – 125 °C
Tambient-40 °C – 85 °C
PackageFCBGA-1310 (BGA)
Dimension34 mm x 28 mm
Ball Count1310
Ball CompSAC405

Atom C3508 is a 64-bit quad-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3508, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 1.6 GHz with a TDP of 11.25 W. The C3508 supports up to 256 GiB of dual-channel DDR4-1866 ECC memory. This model is part of Denverton's Internet of Things and eTEMP SKUs which come with integrated QuickAssist Technology and support extended ambient operating temperature (-40 °C to 85 °C).


Main article: Goldmont § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$224 KiB
0.219 MiB
229,376 B
2.13623e-4 GiB
L1I$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
4x32 KiB8-way set associativewrite-back
L1D$96 KiB
0.0938 MiB
98,304 B
9.155273e-5 GiB
4x24 KiB6-way set associativewrite-back

L2$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB16-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-1866
Supports ECCYes
Max Mem256 GiB
Max Bandwidth27.82 GiB/s
Single 13.91 GiB/s
Double 27.82 GiB/s


This chip incorporates 8 high-speed I/O (HSIO) lanes that may be configured as any combination of the following:

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 8
Configuration: x8, x4, x2, x1
USBRevision: 3.0
Max Ports: 8
SATARevision: 3.0
Max Ports: 8
HSIOMax Lanes: 8


[Edit/Modify Network Info]

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2.5GbEYes (Ports: 4)


Facts about "Atom C3508 - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Atom C3508 - Intel#package + and Atom C3508 - Intel#pcie +
base frequency1,600 MHz (1.6 GHz, 1,600,000 kHz) +
clock multiplier16 +
core count4 +
core family6 +
core model95 +
core nameDenverton +
core steppingB1 +
designerIntel +
familyAtom +
first announcedAugust 15, 2017 +
first launchedAugust 15, 2017 +
full page nameintel/atom/c3508 +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions + and Integrated QuickAssist Technology +
has integrated intel quickassist technologytrue +
has intel enhanced speedstep technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size0.219 MiB (224 KiB, 229,376 B, 2.13623e-4 GiB) +
l1d$ description6-way set associative +
l1d$ size0.0938 MiB (96 KiB, 98,304 B, 9.155273e-5 GiB) +
l1i$ description8-way set associative +
l1i$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l2$ description16-way set associative +
l2$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldateAugust 15, 2017 +
main imageFile:denverton (front).png +
manufacturerIntel +
market segmentServer + and Embedded +
max ambient temperature358.15 K (85 °C, 185 °F, 644.67 °R) +
max case temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max cpu count1 +
max hsio lanes8 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory262,144 MiB (268,435,456 KiB, 274,877,906,944 B, 256 GiB, 0.25 TiB) +
max memory channels2 +
max sata ports8 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
max usb ports8 +
microarchitectureGoldmont +
min ambient temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberC3508 +
nameAtom C3508 +
packageFCBGA-1310 +
part numberHW8076503693501 +
part ofInternet of Things and eTEMP SKUs +
process14 nm (0.014 μm, 1.4e-5 mm) +
s-specSR3JX +
series3000 +
supported memory typeDDR3L-1600 + and DDR4-1866 +
tdp11.25 W (11,250 mW, 0.0151 hp, 0.0113 kW) +
technologyCMOS +
thread count4 +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +