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i486SX2-50 - Intel
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Template:mpu i486SX2-50 was a fourth-generation x86 microprocessor introduced by Intel in the early 1990s. This chip, which is based on the 80486 microarchitecture, had a clock doubler operating at 50 MHz, twice the bus speed. In contrast to the i486DX chips, the i486SX line had no functional FPU on-die.

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KB
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1x8 KB 4-way set associative (unified, write-through policy)

Graphics

This chip had no integrated graphics processing unit.

Features

See also

Facts about "i486SX2-50 - Intel"
l1$ description4-way set associative +