Semiconductor & Computer Engineering
(→List of instruction set architectures) |
(→List of microarchitectures) |
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| Line 128: | Line 128: | ||
* {{intel|Enhanced NetBurst|l=arch}} | * {{intel|Enhanced NetBurst|l=arch}} | ||
}} | }} | ||
| + | |||
{{collist | {{collist | ||
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| style= margin-left: 20px; | | style= margin-left: 20px; | ||
| | | | ||
| − | '''Client:''' | + | '''Client SoC:''' |
* {{intel|Core (client)|l=arch}} | * {{intel|Core (client)|l=arch}} | ||
* {{intel|Penryn (client)|l=arch}} | * {{intel|Penryn (client)|l=arch}} | ||
| Line 154: | Line 155: | ||
* {{intel|Meteor Lake|l=arch}} | * {{intel|Meteor Lake|l=arch}} | ||
}} | }} | ||
| + | |||
{{collist | {{collist | ||
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| style= margin-left: 20px; | | style= margin-left: 20px; | ||
| | | | ||
| − | '''Server:''' | + | '''Server SoC:''' |
* {{intel|Core (server)|l=arch}} | * {{intel|Core (server)|l=arch}} | ||
* {{intel|Penryn (server)|l=arch}} | * {{intel|Penryn (server)|l=arch}} | ||
| Line 176: | Line 178: | ||
}} | }} | ||
| − | ''' | + | |
| + | {{collist | ||
| + | | count = 4 | ||
| + | | style= margin-left: 20px; | ||
| + | | | ||
| + | '''High-Perf (Big Cores):''' | ||
| + | * {{intel|Palm Cove|l=arch}} | ||
| + | * {{intel|Sunny Cove|l=arch}} | ||
| + | * {{intel|Willow Cove|l=arch}} | ||
| + | * {{intel|Golden Cove|l=arch}} | ||
| + | * {{intel|Ocean Cove|l=arch}} | ||
| + | }} | ||
| + | |||
| + | |||
{{collist | {{collist | ||
| − | | count = | + | | count = 4 |
| + | | style= margin-left: 20px; | ||
| | | | ||
| + | '''High-Efficiency (Small Cores)''' | ||
* {{intel|Bonnell|l=arch}} | * {{intel|Bonnell|l=arch}} | ||
* {{intel|Saltwell|l=arch}} | * {{intel|Saltwell|l=arch}} | ||
| Line 188: | Line 205: | ||
* {{intel|Tremont|l=arch}} | * {{intel|Tremont|l=arch}} | ||
}} | }} | ||
| + | |||
'''MCU:''' | '''MCU:''' | ||
{{collist | {{collist | ||
| Line 194: | Line 212: | ||
* {{intel|Lakemont|l=arch}} | * {{intel|Lakemont|l=arch}} | ||
}} | }} | ||
| + | |||
'''ULP ([[ARM]]):''' | '''ULP ([[ARM]]):''' | ||
{{collist | {{collist | ||
| Line 205: | Line 224: | ||
* Continued by [[Marvell]] .. | * Continued by [[Marvell]] .. | ||
}} | }} | ||
| + | |||
| + | |||
'''Server (EPIC) ([[Itanium]]):''' | '''Server (EPIC) ([[Itanium]]):''' | ||
{{collist | {{collist | ||
Revision as of 19:45, 20 December 2018
| Intel | |||||||||
.svg){kind=logo}
| |||||||||
| Type | Public | ||||||||
| Founded | July 18, 1968 Mountain View, California | ||||||||
| Founder | Gordon Moore Robert Noyce Andrew Grove | ||||||||
| Headquarters | Santa Clara, California | ||||||||
| Website | http://www.intel.com | ||||||||
| |||||||||
.svg){kind=logo}
.svg)
Intel Corporation is an American semiconductor company. While most notably known for their development of microprocessors and x86, Intel also designs and manufactures other integrated circuits including flash memory, network interface controllers, GPUs, chipsets, motherboards, and computers.
In addition to x86, Intel used to also design and manufacture ARM-based chips as well as embed ARC-based cores in their products. While they no longer sell such chips, they still use ARM processors in various products (e.g. in their FPGAs) as well as still retain full a architectural level ARM license allowing them to design and sell their own ARM devices should they wish to.
Contents
Find Chip
- By S-Spec
List of processor families
- 3000
- 80186
- 80188
- 80286
- 80376
- 80386
- 80486
- Atom
- Atom x3
- Atom x5
- Atom x7
- Celeron
- Celeron D
- Celeron M
- Core 2 Duo
- Core 2 Extreme
- Core 2 Quad
- Core 2 Quad Extreme
- Core 2 Solo
- Core Duo
- Core i3
- Core i5
- Core i7
- Core i7 EE
- Core i9
- Core M
- Core Solo
- EP80579
- i860
- i960
- iAPX432
- Itanium
- Itanium 2
- MCS-4
- MCS-40
- MCS-48
- MCS-51
- MCS-8
- MCS-80
- MCS-85
- MCS-86
- MCS-88
- MCS-96
- Mobile Pentium II
- Pentium
- Pentium (2009)
- Pentium 4
- Pentium 4 EE
- Pentium 4-M
- Pentium D
- Pentium EE
- Pentium Gold
- Pentium II
- Pentium III
- Pentium III Mobile
- Pentium III Xeon
- Pentium II Mobile
- Pentium II Xeon
- Pentium M
- Pentium MMX
- Pentium Pro
- Pentium Silver
- PXA
- Quark
- Xeon
- Xeon Bronze
- Xeon D
- Xeon E
- Xeon E3
- Xeon E5
- Xeon E7
- Xeon Gold
- Xeon Platinum
- Xeon Silver
- Xeon W
List of instruction set architectures
List of microarchitectures
Mainstream (x86):
Client SoC:
Server SoC:
High-Perf (Big Cores):
High-Efficiency (Small Cores)
MCU:
ULP (ARM):
Server (EPIC) (Itanium):
Early Research:
- Knights Ferry (Aubrey Isle)
- Knights Corner (Angel Isle)
- Knights Landing
- Knights Mill
- Knights Hill
- Knights Peak
Heterogeneous:
GPU:
Integrated:
Discrete:
Other Chips
Architectural Concepts
Other
Other topics
Technologies
Documents
See Documents.
| company type | public + |
| founded | July 18, 1968 + |
| founded location | Mountain View, California + |
| founder | Gordon Moore +, Robert Noyce + and Andrew Grove + |
| full page name | intel + |
| headquarters | Santa Clara, California + |
| instance of | semiconductor company + |
| name | Intel + |
| website | http://www.intel.com + |
| wikidata id | Q248 + |
