Revision history of "intel/microarchitectures/ice lake (server)"

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(cur | prev) 18:41, 26 March 2024‎ 84.239.25.18 (talk)‎ . . (7,768 bytes) (+1)‎ . . (undo)
(cur | prev) 18:41, 26 March 2024‎ 84.239.25.18 (talk)‎ . . (7,767 bytes) (+89)‎ . . (Correcting Predecessor and Contemporary architectures) (undo)
(cur | prev) 10:39, 9 December 2021‎ 66.73.207.179 (talk)‎ . . (7,678 bytes) (+3)‎ . . (model info from Intel doc 637780 and verified on HW) (undo)
(cur | prev) 08:46, 14 September 2021‎ 86.44.196.14 (talk)‎ . . (7,675 bytes) (0)‎ . . (undo)
(cur | prev) 12:48, 20 June 2021‎ 173.244.217.55 (talk)‎ . . (7,675 bytes) (+384)‎ . . (undo)
(cur | prev) 12:33, 20 June 2021‎ 173.244.217.55 (talk)‎ . . (7,291 bytes) (+97)‎ . . (undo)
(cur | prev) 11:33, 15 February 2021‎ 35.1.6.254 (talk)‎ . . (7,194 bytes) (0)‎ . . (update) (undo)
(cur | prev) 11:28, 19 January 2021‎ 84.247.45.61 (talk)‎ . . (7,194 bytes) (+1)‎ . . (undo)
(cur | prev) 05:28, 9 September 2020‎ 91.140.117.122 (talk)‎ . . (7,193 bytes) (+10)‎ . . (→‎Compiler support) (undo)
(cur | prev) 23:05, 23 March 2020‎ David (talk | contribs)‎ m . . (7,183 bytes) (+7,183)‎ . . (Reverted edits by 178.32.136.127 (talk) to last revision by 192.55.54.40) (undo)
(cur | prev) 18:44, 23 March 2020‎ 178.32.136.127 (talk)‎ . . (empty) (-7,183)‎ . . (Blanked the page) (undo)
(cur | prev) 18:27, 2 January 2020‎ 192.55.54.40 (talk)‎ . . (7,183 bytes) (+42)‎ . . (→‎Compiler support: per https://gcc.gnu.org/onlinedocs/gcc/x86-Built-in-Functions.html and https://reviews.llvm.org/D45055 icelake-client and icelake-server are different targets) (undo)
(cur | prev) 10:30, 26 June 2019‎ David (talk | contribs)‎ . . (7,141 bytes) (+11)‎ . . (undo)
(cur | prev) 16:39, 22 May 2019‎ David (talk | contribs)‎ . . (7,130 bytes) (-888)‎ . . (→‎New instructions) (undo)
(cur | prev) 15:13, 21 May 2019‎ David (talk | contribs)‎ . . (8,018 bytes) (+125)‎ . . (→‎Release Dates) (undo)
(cur | prev) 15:10, 21 May 2019‎ David (talk | contribs)‎ . . (7,893 bytes) (+94)‎ . . (undo)
(cur | prev) 14:58, 21 May 2019‎ David (talk | contribs)‎ . . (7,799 bytes) (+57)‎ . . (→‎Key changes from {{\\|Cascade Lake}}) (undo)
(cur | prev) 20:41, 14 May 2019‎ David (talk | contribs)‎ . . (7,742 bytes) (+100)‎ . . (→‎Key changes from {{\\|Cascade Lake}}) (undo)
(cur | prev) 00:39, 10 March 2019‎ David (talk | contribs)‎ m . . (7,642 bytes) (0)‎ . . (Reverted edits by 73.116.106.65 (talk) to last revision by Inject) (undo)
(cur | prev) 00:27, 10 March 2019‎ 73.116.106.65 (talk)‎ . . (7,642 bytes) (0)‎ . . (→‎Key changes from {{\\|Cascade Lake}}) (undo)
(cur | prev) 01:38, 5 November 2018‎ Inject (talk | contribs)‎ . . (7,642 bytes) (0)‎ . . (undo)
(cur | prev) 11:41, 21 August 2018‎ 213.175.37.10 (talk)‎ . . (7,642 bytes) (-2)‎ . . (undo)
(cur | prev) 16:08, 28 April 2018‎ Inject (talk | contribs)‎ . . (7,644 bytes) (+55)‎ . . (→‎Key changes from {{\\|Cascade Lake}}) (undo)
(cur | prev) 18:23, 9 April 2018‎ David (talk | contribs)‎ . . (7,589 bytes) (+214)‎ . . (→‎Architecture) (undo)
(cur | prev) 02:19, 6 April 2018‎ ChipIt (talk | contribs)‎ . . (7,375 bytes) (+1)‎ . . (undo)
(cur | prev) 02:07, 6 April 2018‎ ChipIt (talk | contribs)‎ . . (7,374 bytes) (+9)‎ . . (undo)
(cur | prev) 14:10, 4 April 2018‎ David (talk | contribs)‎ . . (7,365 bytes) (+94)‎ . . (→‎New instructions) (undo)
(cur | prev) 19:58, 9 March 2018‎ At32Hz (talk | contribs)‎ . . (7,271 bytes) (+94)‎ . . (undo)
(cur | prev) 19:49, 9 March 2018‎ At32Hz (talk | contribs)‎ . . (7,177 bytes) (+7,177)‎ . . (server page up)

codename	Ice Lake (server) +
core count	8 +, 10 +, 12 +, 16 +, 18 +, 20 +, 24 +, 26 +, 28 +, 32 +, 36 +, 38 + and 40 +
designer	Intel +
first launched	April 2021 +
full page name	intel/microarchitectures/ice lake (server) +
instance of	microarchitecture +
instruction set architecture	x86-64 +
manufacturer	Intel +
microarchitecture type	CPU +
name	Ice Lake (server) +
pipeline stages (max)	19 +
pipeline stages (min)	14 +

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