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Latest revision | Your text | ||
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** Gen 11.5 (from Gen9/Gen9.5) | ** Gen 11.5 (from Gen9/Gen9.5) | ||
** DisplayPort 1.4a with Display Stream Compression(DSC) (from DisplayPort 1.2) | ** DisplayPort 1.4a with Display Stream Compression(DSC) (from DisplayPort 1.2) | ||
− | ** | + | ** HDMI 2.0 (from HDMI 1.4) |
* IPU | * IPU | ||
** 4th Gen IPU (from 3rd Gen in {{\\|Skylake (client)|Skylake}}) | ** 4th Gen IPU (from 3rd Gen in {{\\|Skylake (client)|Skylake}}) | ||
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** New concurrent image pipeline | ** New concurrent image pipeline | ||
** on-die MIPI interface | ** on-die MIPI interface | ||
− | |||
− | |||
* I/O | * I/O | ||
** Thunderbolt 3 over Type-C | ** Thunderbolt 3 over Type-C |
Facts about "Ice Lake (client) - Microarchitectures - Intel"
codename | Ice Lake (client) + |
core count | 2 + and 4 + |
designer | Intel + |
first launched | May 27, 2019 + |
full page name | intel/microarchitectures/ice lake (client) + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Ice Lake (client) + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |