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Latest revision | Your text | ||
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* 25.228 mm x 27.48416 mm | * 25.228 mm x 27.48416 mm | ||
− | [[File:power9 | + | [[File:power9 die shot.jpg|class=wikichip_ogimage|600px]] |
− | [[File:power9 | + | [[File:power9 die shot (annotated).png|600px]] |
=== Scale up === | === Scale up === |
Facts about "POWER9 - Microarchitectures - IBM"
codename | POWER9 + |
core count | 24 +, 4 +, 8 +, 12 +, 16 + and 20 + |
designer | IBM + |
first launched | August 2017 + |
full page name | ibm/microarchitectures/power9 + |
instance of | microarchitecture + |
instruction set architecture | Power ISA v3.0B + |
manufacturer | GlobalFoundries + |
microarchitecture type | CPU + |
name | POWER9 + |
phase-out | 2020 + |
pipeline stages (max) | 16 + |
pipeline stages (min) | 12 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |