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Facts about "Hi1612 - HiSilicon"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Hi1612 - HiSilicon#pcie +
base frequency2,100 MHz (2.1 GHz, 2,100,000 kHz) +
core count32 +
core nameCortex-A57 +
designerHiSilicon + and ARM Holdings +
familyHi16xx +
first announcedJune 4, 2016 +
first launchedJune 4, 2016 +
full page namehisilicon/kunpeng/hi1612 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaARMv8 +
isa familyARM +
l1$ size2.5 MiB (2,560 KiB, 2,621,440 B, 0.00244 GiB) +
l1d$ description8-way set associative +
l1d$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l1i$ description8-way set associative +
l1i$ size1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) +
l2$ description8-way set associative +
l2$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
l3$ description16-way set associative +
l3$ size32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) +
ldateJune 4, 2016 +
manufacturerTSMC +
market segmentServer +
max cpu count2 +
max memory262,144 MiB (268,435,456 KiB, 274,877,906,944 B, 256 GiB, 0.25 TiB) +
max memory bandwidth63.58 GiB/s (110.629 GB/s, 65,105.92 MiB/s, 0.0621 TiB/s, 0.0683 TB/s) +
max memory channels4 +
microarchitectureCortex-A57 +
model numberHi1612 +
nameHi1612 +
process16 nm (0.016 μm, 1.6e-5 mm) +
smp max ways2 +
supported memory typeDDR4-2133 +
technologyCMOS +
thread count32 +
used byHiSilicon D03 + and Huawei Taishan 2180 +
word size64 bit (8 octets, 16 nibbles) +