Editing hisilicon/kunpeng/920-6426 (section)

== Utilizing devices ==
* [[used by::HiSilicon D06]]
* [[used by::TaiShan 2280]]
* [[used by::TaiShan 5280]]
* [[used by::TaiShan 5290]]
* [[used by::TaiShan X6000]]

{{expand list}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Kunpeng 920-6426 - HiSilicon#pcie +
base frequency	2,600 MHz (2.6 GHz, 2,600,000 kHz) +
core count	64 +
core name	TaiShan v110 +
designer	HiSilicon + and ARM Holdings +
die count	3 +
family	Hi16xx +
first announced	September 2018 +
first launched	January 7, 2019 +
full page name	hisilicon/kunpeng/920-6426 +
has ecc memory support	true +
instance of	microprocessor +
is multi-chip package	true +
isa	ARMv8.2 +
isa family	ARM +
l1$ size	8,192 KiB (8,388,608 B, 8 MiB) +
l1d$ size	4,096 KiB (4,194,304 B, 4 MiB) +
l1i$ size	4,096 KiB (4,194,304 B, 4 MiB) +
l2$ size	32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) +
l3$ size	64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) +
ldate	January 7, 2019 +
main image	+
manufacturer	TSMC +
market segment	Server +
max cpu count	4 +
max memory	2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) +
max memory bandwidth	190.7 GiB/s (195,276.8 MiB/s, 204.763 GB/s, 204,762.566 MB/s, 0.186 TiB/s, 0.205 TB/s) +
max memory channels	8 +
max sata ports	2 +
max usb ports	4 +
microarchitecture	TaiShan v110 +
model number	920-6426 +
name	Kunpeng 920-6426 +
series	920 +
smp max ways	4 +
supported memory type	DDR4-2933 +
tdp	195 W (195,000 mW, 0.261 hp, 0.195 kW) +
technology	CMOS +
thread count	64 +
transistor count	20,000,000,000 +
used by	HiSilicon D06 +, TaiShan 5280 +, TaiShan 5290 +, TaiShan X6000 + and TaiShan 2280 +
word size	64 bit (8 octets, 16 nibbles) +