Semiconductor & Computer Engineering
From WikiChip
Information for "hisilicon/kirin/970"
Basic information
| Display title | Kirin 970 - HiSilicon |
| Default sort key | Kirin 970, HiSilicon |
| Page length (in bytes) | 6,107 |
| Page ID | 25508 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 8 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | Inject (talk | contribs) |
| Date of page creation | 00:29, 7 September 2017 |
| Latest editor | 194.190.63.140 (talk) |
| Date of latest edit | 17:25, 1 January 2022 |
| Total number of edits | 86 |
| Total number of distinct authors | 43 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (18) | Templates used on this page:
|
Facts about "Kirin 970 - HiSilicon"
| base frequency | 1,800 MHz (1.8 GHz, 1,800,000 kHz) + and 2,360 MHz (2.36 GHz, 2,360,000 kHz) + |
| core count | 8 + |
| core name | Cortex-A53 + and Cortex-A73 + |
| designer | HiSilicon + and ARM Holdings + |
| die area | 96.72 mm² (0.15 in², 0.967 cm², 96,720,000 µm²) + |
| die length | 9.75 mm (0.975 cm, 0.384 in, 9,750 µm) + |
| die width | 9.92 mm (0.992 cm, 0.391 in, 9,920 µm) + |
| family | Kirin + |
| first announced | September 1, 2017 + |
| first launched | September 1, 2017 + |
| full page name | hisilicon/kirin/970 + |
| has ecc memory support | false + |
| instance of | microprocessor + |
| integrated gpu | Mali-G72 + |
| integrated gpu base frequency | 746 MHz (0.746 GHz, 746,000 KHz) + |
| integrated gpu designer | ARM Holdings + |
| integrated gpu execution units | 12 + |
| isa | ARMv8 + |
| isa family | ARM + |
| l1$ size | 512 KiB (524,288 B, 0.5 MiB) + and 256 KiB (262,144 B, 0.25 MiB) + |
| l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + and 128 KiB (131,072 B, 0.125 MiB) + |
| l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + and 128 KiB (131,072 B, 0.125 MiB) + |
| l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + and 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
| ldate | September 1, 2017 + |
| main image |  + |
| manufacturer | TSMC + |
| market segment | Mobile + |
| max cpu count | 1 + |
| max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
| max memory bandwidth | 27.82 GiB/s (28,487.68 MiB/s, 29.871 GB/s, 29,871.498 MB/s, 0.0272 TiB/s, 0.0299 TB/s) + |
| max memory channels | 4 + |
| microarchitecture | Cortex-A53 + and Cortex-A73 + |
| model number | 970 + |
| name | Kirin 970 + |
| part number | Hi3670 + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |
| series | 900 + |
| smp max ways | 1 + |
| supported memory type | LPDDR4X-3732 + |
| technology | CMOS + |
| thread count | 8 + |
| transistor count | 5,500,000,000 + |
| used by | Huawei Mate 10 +, Huawei Mate 10 Pro +, Huawei Mate 10 Porsche Design +, Huawei Mate RS Porsche Design +, Huawei P20 +, Huawei P20 Pro +, Huawei Nova 3 +, Huawei Nova 4 +, Honor V10 (Honor View 10) +, Honor 10 +, Honor Play 2 +, Honor Note 10 +, HiKey 970 +, Honor 8 Pro + and Honor Play + |
| word size | 64 bit (8 octets, 16 nibbles) + |
