From WikiChip
QorIQ P1014 - Freescale
< freescale/qoriq
Revision as of 16:13, 13 December 2017 by ChippyBot (talk | contribs) (Bot: moving all {{mpu}} to {{chip}})
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

Edit Values
QorIQ P1014
qoriq p1014.png
General Info
DesignerFreescale
ManufacturerIBM
Model NumberP1014
MarketNetworking, Embedded
Introduction2010 (announced)
2011 (launched)
General Specs
FamilyQorIQ
SeriesP1
Frequency800 MHz
Microarchitecture
ISAPower ISA v2.03 (Power)
Microarchitecturee500
Core Namee500 v2
Process45 nm
TechnologyCMOS
Word Size32 bit
Cores1
Threads1
Electrical
Power dissipation1.13 W
Tjunction0 °C – 125 °C
Packaging
PackageTE-PBGA-II-689 (TE PBGA-II)
Temperature-Enhanced Plastic BGA
Dimension31 mm x 31 mm
Contacts689
PackageTE-PBGA-425 (TE PBGA)
Temperature-Enhanced Plastic BGA
Dimension19 mm x 19 mm
Pitch0.8 mm
Contacts425

QorIQ P1014 is a 32-bit embedded POWER microprocessor introduced by Freescale in 2008. This networking/embedded processor, which is based on the e500 microarchitecture and is fabricated on a 45 nm SOI process, operates at 800 MHz and supports 16-bit DDR3-800 memory.

Cache[edit]

Main article: e500 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$64 KiB
65,536 B
0.0625 MiB
L1I$32 KiB
32,768 B
0.0313 MiB
1x32 KiB8-way set associative 
L1D$32 KiB
32,768 B
0.0313 MiB
1x32 KiB8-way set associative 

L2$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
  1x256 KiB8-way set associativeWrite-through

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-800
Supports ECCYes
Controllers1
Channels1
Width16 bit
Max Bandwidth1.49 GiB/s
1,525.76 MiB/s
1.6 GB/s
1,599.875 MB/s
0.00146 TiB/s
0.0016 TB/s
Bandwidth
Single 1.49 GiB/s

Expansions[edit]

  • 2x 10/100/1000 Eithernet with SGMII
  • 2x PCIe 1.0a controllers with 2 SerDes

Block Diagram[edit]

qoriq p1014 block diagram.png
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
QorIQ P1014 - Freescale#package +
base frequency800 MHz (0.8 GHz, 800,000 kHz) +
core count1 +
core namee500 v2 +
designerFreescale +
familyQorIQ +
first announced2010 +
first launched2011 +
full page namefreescale/qoriq/p1014 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaPower ISA v2.03 +
isa familyPower +
l1$ size64 KiB (65,536 B, 0.0625 MiB) +
l1d$ description8-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description8-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
l2$ description8-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldate2011 +
main imageFile:qoriq p1014.png +
manufacturerIBM +
market segmentNetworking + and Embedded +
max junction temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
max memory bandwidth1.49 GiB/s (1,525.76 MiB/s, 1.6 GB/s, 1,599.875 MB/s, 0.00146 TiB/s, 0.0016 TB/s) +
max memory channels1 +
microarchitecturee500 +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model numberP1014 +
nameQorIQ P1014 +
packageTE-PBGA-II-689 + and TE-PBGA-425 +
power dissipation1.13 W (1,130 mW, 0.00152 hp, 0.00113 kW) +
process45 nm (0.045 μm, 4.5e-5 mm) +
seriesP1 +
supported memory typeDDR3-800 +
technologyCMOS +
thread count1 +
word size32 bit (4 octets, 8 nibbles) +