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StrongARM - Microarchitectures - DEC
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StrongARM µarch
General Info
Arch TypeCPU
DesignerDEC, ARM Holdings
ManufacturerDEC
IntroductionFebruary 5, 1996
Process0.35 µm
Core Configs1
Pipeline
OoOENo
SpeculativeYes
Reg RenamingNo
Stages5
Decode1-way
Instructions
ISAARMv4
Cache
L1I Cache16 KiB/core
32-way set associative
L1D Cache16 KiB/core
32-way set associative
Succession

StrongARM was a microarchitecture for DEC's series of ARM-based microprocessors branded under the same name. This microarchitecture was the result of a collaborative effort by DEC and ARM.

Overview

The StrongARM microarchitecture started as a collaborative project between ARM and DEC in the mid-1990s. The primary design goal was to develop a new class of high-performance low-power ARM-based processors. Earlier ARM architectures were simply insufficiently weak to power more advanced mobile devices such as PDAs and set-tops. Because of the new design goals, StrongARM implemented a number of new techniques not found in previous ARM architectures.

The historical significance of the StrongARM development cannot be overstated. StrongARM implemented the same ARM architecture as the ARM8 - ARMv4. The route ARM took to improve the ARM7 through the ARM8 was to widen the pipeline which allowed for double the speed at the cost of more die space for an identical process. ARM8 was consequently seldom licensed and has largely faded into obscurity. The StrongARM on the other hand resulted in performance increase of up to 5 times as much. StrongARM enjoyed a series of design wins such as Psion 7 Series, Apple's MessagePad 2000/2100, Yakumo Alpha PDA, and various PDAs from HP's Jornada line. After being sold to Intel in 1997, the architecture was enhanced and went on to dominate the PDA and light mobile market for close to a decade before being sold to Marvell just prior to the smartphone boom in 2006.

References

  • Witek, Rich, and James Montanaro. "StrongARM: a high-performance ARM processor." Compcon'96. 'Technologies for the Information Superhighway' Digest of Papers. IEEE, 1996.
codenameStrongARM +
core count1 +
designerDEC + and ARM Holdings +
first launchedFebruary 5, 1996 +
full page namedec/microarchitectures/strongarm +
instance ofmicroarchitecture +
instruction set architectureARMv4 +
manufacturerDEC +
microarchitecture typeCPU +
nameStrongARM +
pipeline stages5 +
process350 nm (0.35 μm, 3.5e-4 mm) +