Revision history of "cea-leti/microarchitectures/tsarlet"

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(cur | prev) 10:17, 27 March 2020‎ 132.166.183.104 (talk)‎ . . (12,420 bytes) (+29)‎ . . (→‎Bibliography) (undo)
(cur | prev) 02:35, 2 March 2020‎ David (talk | contribs)‎ . . (12,391 bytes) (+1,085)‎ . . (→‎Compute chiplet) (undo)
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(cur | prev) 03:42, 29 February 2020‎ David (talk | contribs)‎ . . (1,359 bytes) (+58)‎ . . (→‎Compute chiplet) (undo)
(cur | prev) 03:23, 29 February 2020‎ David (talk | contribs)‎ m . . (1,301 bytes) (0)‎ . . (David moved page cea-leti/tsarlet to cea-leti/microarchitectures/tsarlet without leaving a redirect) (undo)
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(cur | prev) 02:05, 29 February 2020‎ David (talk | contribs)‎ m . . (531 bytes) (0)‎ . . (David moved page cea-leti/96-core 6-chiplet mips processor to cea-leti/tsarlet without leaving a redirect: CEA told me there's a name for it...) (undo)
(cur | prev) 02:00, 29 February 2020‎ David (talk | contribs)‎ . . (531 bytes) (+531)‎ . . (cea leti soc)

codename	TSARLET +
core count	96 +
designer	CEA-Leti +
full page name	cea-leti/microarchitectures/tsarlet +
instance of	microarchitecture +
instruction set architecture	MIPS32v1 +
manufacturer	STMicroelectronics +
microarchitecture type	CPU +
name	TSARLET +
pipeline stages	5 +
process	28 nm (0.028 μm, 2.8e-5 mm) + and 65 nm (0.065 μm, 6.5e-5 mm) +

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