Interconnect Architectures

Concepts

System Bus Network On A Chip

General

AGP CAPI CCIX CCPI DMI (IBM) DMI (Intel) EISA Gen-Z Hydra HT IF ISA LIPINCON Micro Channel Multibus NVLink PCI PCIe PXI Q-Bus QPI S-100 SS-50 Unibus UPI VLB

Peripheral

1-Wire ACCESS.bus Centronics GPIB MIDI RS-232 RS-422 RS-423 UNI/O bus

Storage Devices

NVMe PATA SATA SATAe SSA SCSI

Audio Devices

I²S S/PDIF

Cache Coherent Interconnect for Accelerators (CCIX), pronounced "see-six", is an open cache coherent interconnect architecture developed by the CCIX Consortium.

Overview

CCIX is a high-performance, low latency, chip-to-chip interconnect architecture that provides a cache coherent framework for heterogeneous system architectures. Cache coherency is automatically maintained at all time between the central processing unit and the various other accelerators in the system. CCIX supports signaling rates between 16 GT/s and 25 GT/s per link with support for link aggregation for higher performance.