Semiconductor & Computer Engineering
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== Models == | == Models == | ||
| − | {{ | + | === Vulcan === |
| + | The first parts of the ThunderX2 family that made it to general availability are based on the {{cavium|Vulcan|l=arch}} microarchitecture. Those parts are different from Cavium's original ThunderX2 design which started sampling in 2016. Originally designed by [[Broadcom]], those parts have much higher performance and a slightly different set of features. All parts have the following features in common. | ||
| + | |||
| + | * '''Mem:''' Up to 2 TiB of quad/hexa/octa- channel DDR4 2666 MT/s memory | ||
| + | ** Up to 4 TiB in dual-socket configuration | ||
| + | * '''ISA:''' [[ARMv8]], 128-bit {{arm|SVE}} | ||
| + | * '''I/O:''' x48, x56 PCIe Gen 3 Lanes | ||
== See also == | == See also == | ||
* Qualcomm's {{qualcomm|Centriq}} | * Qualcomm's {{qualcomm|Centriq}} | ||
* Intel's {{intel|Xeon Platinum}}, {{intel|Xeon Gold|Gold}}, and {{intel|Xeon Silver|Silver}} | * Intel's {{intel|Xeon Platinum}}, {{intel|Xeon Gold|Gold}}, and {{intel|Xeon Silver|Silver}} | ||
Revision as of 23:13, 24 June 2018
| ThunderX2 | |
| |
| ThunderX2 | |
| Developer | Cavium |
| Manufacturer | TSMC |
| Type | Microprocessors |
| Introduction | May 30, 2016 (announced) May 7, 2018 (launch) |
| ISA | ARMv8 |
| µarch | ThunderX2, Vulcan |
| Word size | 64 bit 8 octets
16 nibbles |
| Process | 14 nm 0.014 μm , 16 nm1.4e-5 mm 0.016 μm
1.6e-5 mm |
| Technology | CMOS |
| Clock | 2,500 MHz-1,600 MHz |
| Succession | |
| ← | |
| ThunderX | |
ThunderX2 is a family of 64-bit multi-core ARM server microprocessors introduced by Cavium in early 2018 succeeding the original ThunderX line.
Contents
Overview
The ThunderX2 was designed to succeed the original ThunderX family. Cavium first announced the ThunderX2 back in May 30 2016 with models based on their own second-generation microarchitecture with models up to 54 cores. Cavium eventually scrapped their own design and in late 2016 they acquired the Vulcan design from Broadcom which has designed a server microprocessor but has given up on the project for reasons not well understood. In early 2018, Cavium announced that their ThunderX2 processors (now based on Vulcan) have reached general availability.
Models
Vulcan
The first parts of the ThunderX2 family that made it to general availability are based on the Vulcan microarchitecture. Those parts are different from Cavium's original ThunderX2 design which started sampling in 2016. Originally designed by Broadcom, those parts have much higher performance and a slightly different set of features. All parts have the following features in common.
- Mem: Up to 2 TiB of quad/hexa/octa- channel DDR4 2666 MT/s memory
- Up to 4 TiB in dual-socket configuration
- ISA: ARMv8, 128-bit SVE
- I/O: x48, x56 PCIe Gen 3 Lanes
See also
- Qualcomm's Centriq
- Intel's Xeon Platinum, Gold, and Silver
| designer | Cavium + |
| first announced | May 30, 2016 + |
| first launched | May 7, 2018 + |
| full page name | cavium/thunderx2 + |
| instance of | microprocessor family + |
| instruction set architecture | ARMv8 + |
| main designer | Cavium + |
| manufacturer | TSMC + |
| microarchitecture | ThunderX2 + and Vulcan + |
| name | ThunderX2 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + and 16 nm (0.016 μm, 1.6e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |
