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CN8020 - Cavium
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Octeon TX CN8020
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General Info
DesignerCavium
MarketStorage
General Specs
FamilyOCTEON TX
SeriesCN80xx
Frequency1,500MHz
Microarchitecture
ISAArmV8 (ARM)
MicroarchitectureArmv8.1
TechnologyCMOS
Word Size64 bit
Cores2
Threads2
Max Memory16GB
Multiprocessing
Max SMP1-Way (Uniprocessor)

CN8020 is a 64-bit dual-core ARM processor designed by Cavium. This processor, which incorporates 2 thunderx1 cores. This MPU includes a number of hardware accelerators specifically for improving the performance of storage and network software such as networking, TCP & QoS, and crypto acceleration.

Cache

Main articles: cavium/microarchitectures/thunderx1 and Cache

[Edit/Modify Cache Info]

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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$208KiB
212,992 B
0.203 MiB
L1I$144KiB
147,456 B
0.141 MiB
2x72 KiB  
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB  

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  1x1 MiB  

Memory controller

[Edit/Modify Memory Info]

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Integrated Memory Controller
Max TypeDDR3/4-2100
Supports ECCYes
Max Mem16GB
Controllers1
Width72bit

Expansions

[Edit/Modify Expansions Info]

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Expansion Options


Networking

Interface options:

Hardware Accelerators

[Edit/Modify Accelerators Info]

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Hardware Accelerators
Networking
TCPYes
QoSYes

Block diagram

Datasheet

Facts about "CN8020 - Cavium"
base frequency1,500 MHz (1.5 GHz, 1,500,000 kHz) +
core count2 +
designerCavium +
familyOCTEON TX +
full page namecavium/octeon tx/cn8020 +
has ecc memory supporttrue +
has hardware accelerators for network quality of service processingtrue +
has hardware accelerators for tcp packet processingtrue +
instance ofmicroprocessor +
isaArmV8 +
isa familyARM +
l1$ size208 KiB (212,992 B, 0.203 MiB) +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ size144 KiB (147,456 B, 0.141 MiB) +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldate1900 +
market segmentStorage +
max cpu count1 +
microarchitectureArmv8.1 +
nameOcteon TX CN8020 +
seriesCN80xx +
smp max ways1 +
supported memory typeDDR3/4-2100 +
technologyCMOS +
thread count2 +
word size64 bit (8 octets, 16 nibbles) +