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Information for "cavium/microarchitectures/vulcan"

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Display titleVulcan - Microarchitectures - Cavium
Default sort keyVulcan, Cavium
Page length (in bytes)17,045
Page ID30184
Page content languageEnglish (en)
Page content modelwikitext
Indexing by robotsAllowed
Number of redirects to this page3
Counted as a content pageYes
Number of subpages of this page0 (0 redirects; 0 non-redirects)

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Edit history

Page creatorDavid (talk | contribs)
Date of page creation02:28, 27 May 2018
Latest editor199.233.58.37 (talk)
Date of latest edit18:25, 10 January 2019
Total number of edits60
Total number of distinct authors4
Recent number of edits (within past 90 days)1
Recent number of distinct authors1

Page properties

Transcluded templates (25)

Templates used on this page:

codenameVulcan +
core count16 +, 20 +, 24 +, 28 +, 30 + and 32 +
designerBroadcomm + and Cavium +
first launched2018 +
full page namecavium/microarchitectures/vulcan +
instance ofmicroarchitecture +
instruction set architectureARMv8.1 +
manufacturerTSMC +
microarchitecture typeCPU +
nameVulcan +
pipeline stages (max)15 +
pipeline stages (min)13 +
process16 nm (0.016 μm, 1.6e-5 mm) +